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DRV8662: fixed pin length and stacked pins to avoid ERC error

Frank Severinsen requested to merge github/fork/Shackmeister/DRV8662 into master

Datasheet: http://www.ti.com/product/DRV8662

All pins changed to 100mil length GND (Pin 4,5,6) was stacked. SW (Pin 7 & 8) was stacked. VBST (Pin 10 & 11) was stacked, due to the 2 Power outputs, creating ERC error. Moved NC (Pin 9) on to the outline (according to KLC)

Skærmbillede fra 2019-12-28 02-43-16

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