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AVX512FP16: Add earlyclobber constraints for complex insns

Hongyu Wang requested to merge users/intel/hongyuw1/fix_complex_alloc into users/intel/liuhongt/independentfp16_wip

Complex insns does not allow same input register and output register. Add '&' constraint to patterns to prevent this.

gcc/ChangeLog:

* config/i386/sse.md:
(fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Add
'&' to output constraint.
(<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
(<avx512>_<complexopname>_<mode>_<maskc_name><round_name>): Ditto.
(avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>:
Ditto.
(avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Ditto.
(avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx512fp16-complex-constraints.c: New test.

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