Exploring the viability of a MCS multicore runtime demonstrator: a point-to-point comparison with a temporal isolation kernel - Master Thesis Document
Abstract
The computing power of the processor resources currently deployable in embedded systems allows integrating an increasing quantity of software features in the overall product. At the same time, the effects of digital transformation imply that such required features may be inordinately complex, disparate and heterogeneous, but all in great demand, causing the design process to become more and more challenging. The automotive industry is an evident manifestation of this trend, as modern cars nowadays embed a gigantic number of features realized via software and electronics. The urge to contain production cost, hence also material, has pushed research in the direction of investigating ways to integrate all these functionalities in fewer and fewer hardware units. This research becomes particularly challenging in the context of safety critical systems, where it must be assured that parts do not fails and if they do, the consequences can be contained without causing intolerable detriment to system operation. The severity of the malfunction of a system component determines its level of criticality (also termed "integrity"). The higher the criticality of a component, the more stringent the production and verification requirements on it. The development of these systems is regulated by international standards and conformance practices (e.g. ISO 26262:2018 for automotive domain), which require the manufacturer to prove that functions of different criticality must be isolated from each other, so that the boundary of costly verification may reduce without incurring risks at system level. As a result of that, industry adopts the Time and Space Partitioning (TSP) paradigm, which facilitates the achievement of the required isolation. One distinct consequence of such solution, however, is a low level of CPU utilization, because higher-criticality components (partitions) are usually granted precautionary resource margins which are subtracted from other components that consequently have to be assigned to other processing units or simply be scrapped. Several models aimed at allowing higher utilization without losing safety, have been formulated in the research theory. By implementing one of them, selected from the front of the relevant state of the art, this work tries to understand how viable such models are in practice and do they effectively compare for sustained performance to the more traditional TSP solution.
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