Skip to content

Draft: RISC-V: Add trap handling for interrupts

Felix Puscasu requested to merge felix@rvi-interrupt into felix@rvi-step

What

Introduce MachineState::trap_interrupt(&self, Interrupt) which takes the necessary trap associated with the given Interrupt.

This MR closes #7009 (closed)

Why

This is a necessary part of the "main loop" of the simulation of a RISC-V program.

Manually testing the MR

cd src/risc_v/interpreter && cargo test

Checklist

  • Document the interface of any function added or modified (see the coding guidelines)
  • Document any change to the user interface, including configuration parameters (see node configuration)
  • Provide automatic testing (see the testing guide).
  • For new features and bug fixes, add an item in the appropriate changelog (docs/protocols/alpha.rst for the protocol and the environment, CHANGES.rst at the root of the repository for everything else).
  • Select suitable reviewers using the Reviewers field below.
  • Select as Assignee the next person who should take action on that MR
Edited by Felix Puscasu

Merge request reports