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pull-tcg-20240301
linux-user: Rewrite elf coredump tcg/aarch64: Apple does not align __int128_t in even registers accel/tcg: Fixes for page tables in mmio memory linux-user: Remove qemu_host_page_{size,mask}, HOST_PAGE_ALIGN migration: Remove qemu_host_page_size hw/tpm: Remove qemu_host_page_size softmmu: Remove qemu_host_page_{size,mask}, HOST_PAGE_ALIGN linux-user: Split and reorganize target_mmap. *-user: Deprecate and disable -p pagesize linux-user: Allow TARGET_PAGE_BITS_VARY target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only linux-user: Remove pgb_dynamic alignment assertion tcg/optimize: fix uninitialized variable linux-user: Rewrite shmat
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pull-tcg-20240222-2
tcg/aarch64: Apple does not align __int128_t in even registers accel/tcg: Fixes for page tables in mmio memory linux-user: Remove qemu_host_page_{size,mask}, HOST_PAGE_ALIGN migration: Remove qemu_host_page_size hw/tpm: Remove qemu_host_page_size softmmu: Remove qemu_host_page_{size,mask}, HOST_PAGE_ALIGN linux-user: Split and reorganize target_mmap. *-user: Deprecate and disable -p pagesize linux-user: Allow TARGET_PAGE_BITS_VARY target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only linux-user: Remove pgb_dynamic alignment assertion
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pull-tcg-20240222
tcg/aarch64: Apple does not align __int128_t in even registers accel/tcg: Fixes for page tables in mmio memory linux-user: Remove qemu_host_page_{size,mask}, HOST_PAGE_ALIGN migration: Remove qemu_host_page_size hw/tpm: Remove qemu_host_page_size softmmu: Remove qemu_host_page_{size,mask}, HOST_PAGE_ALIGN linux-user: Split and reorganize target_mmap. *-user: Deprecate and disable -p pagesize linux-user: Allow TARGET_PAGE_BITS_VARY target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only linux-user: Remove pgb_dynamic alignment assertion
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pull-tcg-20240213
tcg: Increase width of temp_subindex tcg/arm: Fix goto_tb for large translation blocks
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pull-tcg-20240205-2
tcg: Introduce TCG_COND_TST{EQ,NE} target/alpha: Use TCG_COND_TST{EQ,NE} target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM} target/s390x: Improve general case of disas_jcc
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pull-tcg-20240205
tcg: Introduce TCG_COND_TST{EQ,NE} target/alpha: Use TCG_COND_TST{EQ,NE} target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM} target/s390x: Improve general case of disas_jcc
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pull-tcg-20240202-2
tests/tcg: Fix multiarch/gdbstub/prot-none.py hw/core: Convert cpu_mmu_index to a CPUClass hook tcg/loongarch64: Set vector registers call clobbered target/sparc: floating-point cleanup linux-user/aarch64: Add padding before __kernel_rt_sigreturn
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pull-tcg-20240202
tests/tcg: Fix multiarch/gdbstub/prot-none.py hw/core: Convert cpu_mmu_index to a CPUClass hook tcg/loongarch64: Set vector registers call clobbered target/sparc: floating-point cleanup
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pull-tcg-20240130
linux-user: Allow gdbstub to ignore page protection cpu-exec: simplify jump cache management include/exec: Cleanups toward building accel/tcg once
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pull-tcg-20240123
tcg/arm: Fix SIGILL in tcg_out_qemu_st_direct tcg/s390x: Fix encoding of VRIc, VRSa, VRSc insns tcg: Clean up error paths in alloc_code_gen_buffer_splitwx_memfd linux-user/riscv: Adjust vdso signal frame cfa offsets linux-user: Fixed cpu restore with pc 0 on SIGBUS
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pull-tcg-20240121
tcg/s390x: Fix encoding of VRIc, VRSa, VRSc insns tcg: Clean up error paths in alloc_code_gen_buffer_splitwx_memfd linux-user/riscv: Adjust vdso signal frame cfa offsets linux-user: Fixed cpu restore with pc 0 on SIGBUS
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pull-tcg-20240111
tcg/i386: Use more 8-bit immediate forms for add, sub, or, xor tcg/ppc: Use new registers for LQ destination util: fix build with musl libc on ppc64le
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pull-20231230
Mark VMStateField and VMStateDescription arrays const.
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pull-tcg-20231212
target/i386: Fix 32-bit wrapping of pc/eip computation (#2022) tcg: Reduce serial context atomicity earlier (#2034)
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pull-lu-20231121
linux-user: Fix loaddr computation for some elf files
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pull-tcg-20231114
accel/tcg: Forward probe size on to notdirty_write accel/tcg: Remove CF_LAST_IO target/sparc: Fix RETURN
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pull-pa-20231113
target/hppa: Mask reserved PSW bits in expand_sm_imm target/hppa: Fix calculation of CR_IIASQ back register target/hppa: Fix possible overflow in TLB size calculation target/hppa: Fix probe instruction target/hppa: Split MMU_PHYS_IDX to MMU_ABS_IDX, MMU_ABS_W_IDX target/hppa: Reduce TARGET_PHYS_ADDR_SPACE_BITS to 40 hw/pci-host/astro: Translate 32-bit pci onto 40-bit runway bus hw/hppa: Update SeaBIOS-hppa to version 12
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pull-pa-20231106
target/hppa: Implement PA2.0 instructions hw/hppa: Map astro chip 64-bit I/O mem hw/hppa: Turn on 64-bit cpu for C3700
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pull-tcg-20231106
util: Add cpuinfo for loongarch64 tcg/loongarch64: Use cpuinfo.h tcg/loongarch64: Improve register allocation for INDEX_op_qemu_ld_a*_i128 host/include/loongarch64: Add atomic16 load and store tcg: Move expanders out of line tcg/mips: Always implement movcond tcg/mips: Implement neg opcodes tcg/loongarch64: Implement neg opcodes tcg: Make movcond and neg required opcodes tcg: Optimize env memory operations tcg: Canonicalize sub of immediate to add tcg/sparc64: Implement tcg_out_extrl_i64_i32
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pull-sp-20231105
target/sparc: Explicitly compute condition codes