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x86/tsc: Trust initial offset in architectural TSC-adjust MSRs

Prarit Bhargava requested to merge prarit/centos-stream-9:RHEL-29437 into main

JIRA: https://issues.redhat.com/browse/RHEL-29437
Upstream Status: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git

commit 455f9075f14484f358b3c1d6845b4a438de198a7
Author: Daniel J Blueman daniel@quora.org
Date: Fri Apr 19 16:51:46 2024 +0800

x86/tsc: Trust initial offset in architectural TSC-adjust MSRs  

When the BIOS configures the architectural TSC-adjust MSRs on secondary  
sockets to correct a constant inter-chassis offset, after Linux brings the  
cores online, the TSC sync check later resets the core-local MSR to 0,  
triggering HPET fallback and leading to performance loss.  

Fix this by unconditionally using the initial adjust values read from the  
MSRs. Trusting the initial offsets in this architectural mechanism is a  
better approach than special-casing workarounds for specific platforms.  

Signed-off-by: Daniel J Blueman <daniel@quora.org>  
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>  
Reviewed-by: Steffen Persvold <sp@numascale.com>  
Reviewed-by: James Cleverdon <james.cleverdon.external@eviden.com>  
Reviewed-by: Dimitri Sivanich <sivanich@hpe.com>  
Reviewed-by: Prarit Bhargava <prarit@redhat.com>  
Link: https://lore.kernel.org/r/20240419085146.175665-1-daniel@quora.org

Omitted-fix: 7598293ab37c ("Merge branch into tip/master: 'x86/timers'")
- only a mention of the commit being merged, not a bug or patch

Signed-off-by: Prarit Bhargava prarit@redhat.com

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