PCI/EDR: Update AER/DPC/EDR error status handling
This patch resolves RHBZ2211286 "M7-Devsts register value doesn’t get
cleared after CTO Triggers DPC". It's a simple fix for AER (DPC, EDR) based
on further understanding of the PCI Firmware specification.
Patch back-ported cleanly. This fix brings RHEL's PCI EDR content up to
date with current upstream.
Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2211286
Depends: N/A
Signed-off-by: Myron Stowe <mstowe@redhat.com>