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x86/mm: Avoid incomplete Global INVLPG flushes

Rafael Aquini requested to merge raquini/centos-stream-9:bz2213663 into main

Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2213663

Some FAM6 Intel CPUs (Alder & Raptor Lakes) have been reported to have
buggy INVLPG implementations that can leave global translation entries
unflushed in the TLB when PCIDs are enabled.

Intel is going to fix this in microcode, eventually. For now, the kernel
will employ the sledgehammer of disabling PCID and forcing full TLB flush
on context switches as a workaround on the affected CPUs.

Signed-off-by: Rafael Aquini aquini@redhat.com

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