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x86/split_lock: Enumerate architectural split lock disable bit

David Arcari requested to merge darcari/centos-stream-9:2123536 into main

Bugzilla: https://bugzilla.redhat.com/2123536 Tested: TBD

commit d7ce15e1d4162ab5e56dead10d4ae69a6b5c8ee8 Author: Fenghua Yu fenghua.yu@intel.com Date: Wed Mar 1 17:19:46 2023 -0800

x86/split_lock: Enumerate architectural split lock disable bit

The December 2022 edition of the Intel Instruction Set Extensions manual
defined that the split lock disable bit in the IA32_CORE_CAPABILITIES MSR
is (and retrospectively always has been) architectural.

Remove all the model specific checks except for Ice Lake variants which are
still needed because these CPU models do not enumerate presence of the
IA32_CORE_CAPABILITIES MSR.

Originally-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/lkml/20220701131958.687066-1-fenghua.yu@intel.com/t/#mada243bee0915532a6adef6a9e32d244d1a9aef4

Signed-off-by: David Arcari darcari@redhat.com

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