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drm/i915: fix TLB invalidation for Gen12 video and compute engines

Wander Lairson Costa requested to merge walac/centos-stream-9:bz2148153-gpu-flush into main

Bugzilla: https://bugzilla.redhat.com/2148153

CVE: CVE-2022-4139

commit 04aa64375f48a5d430b5550d9271f8428883e550 Author: Andrzej Hajda andrzej.hajda@intel.com Date: Mon Nov 14 11:38:24 2022 +0100

drm/i915: fix TLB invalidation for Gen12 video and compute engines

In case of Gen12 video and compute engines, TLB_INV registers are masked -
to modify one bit, corresponding bit in upper half of the register must
be enabled, otherwise nothing happens.

CVE: CVE-2022-4139
Suggested-by: Chris Wilson <chris.p.wilson@intel.com>
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: Wander Lairson Costa wander@redhat.com

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