Draft: Apply latency corrections from top layer of hardware mapping

Explanation of changes

For the Qblox backend, latency corrections for a quantum device was previously provided by the user inside the sequencer dict and was compiled at the sequencer level. With this MR, the user would have to specify these corrections in the top layer of hardware config which would later be incorporated into the schedule directly as an offset for the starting time of the pulse.

#TODO Add previous and new hardware config templates

Things to Note:

• The changes have been made on top of the main branch up to date with the MR 328. However breaking changes can be expected at this point.

Motivation of changes

#TODO add motivation

Merge checklist

See also merge request guidelines

• Merge request has been reviewed and approved by a project maintainer.
• Merge request contains a clear description of the proposed changes and the issue it addresses.
• Merge request made onto appropriate branch (main for most MRs).
• New code is fully tested.
• New code is documented and docstrings use numpydoc format.
• CHANGELOG.rst and AUTHORS.rst have been updated (when applicable).
• CI pipelines pass
  • pre-commit run --all-files --hook-stage commit passes (gitlab-ci),
  • test suite passes (gitlab-ci),
  • no degradation in code-coverage (codacy),
  • no (serious) new pylint code quality issues introduced (codacy),
  • documentation builds successfully (CI and readthedocs),
  • windows tests pass (manually triggered by maintainers before merging).

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For reference, the issues workflow is described in the contribution guidelines.