use CMOS dual port mode for e31x CSTS configurations
What this MR does / why we need it:
Enables dual port mode CMOS to facilitate 2TX2RX.
Adds additional SPI write to set drive strength and skew as well as optimal delay values.
Steps to complete before submitting MR:
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I have read Contribution guidelines -
I have ensured I have a changelog written in the imperative form that is meaningful and accurately summarizes the work done -
I have added the release notes label if applicable (more information below) -
I have ensured the workflow labels are up to date and will continue to do so up until this work is merged into develop -
I have added a category, type, and target release label along with all other labels as need be -
My branch is up to date with develop. If it is not, then I have ensured my work does not conflict with other work -
I agree my bugfix MR does not include new features/enhancements -
I represent that bugfixes have been locally tested against the most recent major.minor release in which the bug exists -
(REVIEWER ONLY) I have thoroughly gone through the above steps to ensure that they have been followed
Release Notes
N/A
Changelog
- enh(osp): support dual port data interface mode on e31x
- enh(osp): achieve higher sample rates 1TX1RX and support 2TX2RX
Which issue(s) this MR closes
Closes #69 (closed)