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update e31x constraints to constrain the correct clock

Aaron Olivarez requested to merge 70-update-e31x-timing-constraints into develop

What this MR does / why we need it:

Update constraints files to constrain the correct fpga clock being used.

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Release Notes

N/A

Changelog

  • bug(hdl): update e31x timing constraints to constrain fclk0

Which issue(s) this MR closes

Closes #70 (closed)

Edited by Connor Lathrop

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