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(#1985) Update zed constraint file addressing zynq prim reorganization

Levi Stalsworth requested to merge 1985-update-constr-for-zynq-prims into develop

What this MR does / why we need it:

This merge request updates the zed.xdc in projects/platform/hdl/platforms to have an updated create_clock call for the vhdl configuration.

Steps to complete before submitting MR:

  • I have read Contribution guidelines
  • When building an assembly that uses that constraint file The file at container-{assembly}/target-zynq/opt.out. A file search for No pins matched should not show the output below.
WARNING: [Vivado 12-508] No pins matched 'ftop/pfconfig_i/e31x_i/worker/ps/ps/PS7_i/FCLKCLK[1]'. [/home/cdat-user/opencpi-20210303/projects/osps/ocpi.osp.e3xx/hdl/assemblies/fsk_modem/e31x_mimo_xcvr_data_src_qadc_ad9361_sub_data_sink_qdac_ad9361_sub_mode_2_cmos.xdc:521]
CRITICAL WARNING: [Vivado 12-4739] create_clock:No valid object(s) found for '-objects [get_pins {ftop/pfconfig_i/e31x_i/worker/ps/ps/PS7_i/FCLKCLK[1]}]'. [/home/cdat-user/opencpi-20210303/projects/osps/ocpi.osp.e3xx/hdl/assemblies/fsk_modem/e31x_mimo_xcvr_data_src_qadc_ad9361_sub_data_sink_qdac_ad9361_sub_mode_2_cmos.xdc:521]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.

Acceptance Criteria

  • No files have the incorrect directory structure in them
  • This update is done for both zed and zcu104 platforms
  • No output files have the WARNING No pins matched in relation to the zynq-7000 clock
  • The unit test for fir_real_sse.test passes
  • The unit test for fir_complex_sse.test passes

Changelog

  • chore(OSP): hdl configuration file update.

Which issue(s) this MR closes

Closes #1985 (closed), #1962 (closed), #1963 (closed)

Edited by Levi Stalsworth

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