Tommy Chen authored May 12, 2023 and Tommy Chen committed May 18, 2023

3 display pipelines on mt8195:
<0> main path: VDOSYS0 pipe0 (max 4K30)
<1> ext path: VDOSYS1 (max 4K60)
<2> sub path: VDOSYS0 pipe1 (max 4K30)

for display-dp.dts
there might have 1 dp output only case, when triple pipelines available.
so assign dp to use <1>, which provides 4K60 performance.

for display-dsi.dts
remove ovl1 disable node, because dualpipe is by default disabled.

for panel-boe-ne135fbm.dts
enable ovl1 dual pipe to merge <0> and <2> output for eDP

Change-Id: Ide1194ffb5f3811a868a3628680e40ac1cac4a11
CR-Id: AUTO00238466
Signed-off-by: Stuart Lee <stuart.lee@mediatek.com>
Signed-off-by: Tommy Chen <tommyyl.chen@mediatek.com>