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[5.10] arm64: dts: mt8365: fix GIC interrupt-cells

Neil Armstrong requested to merge superna9999/linux-mtk-aiot:narmstrong/mtk-5.10/mt8365-fix-gic into mtk-v5.10

The gic interrupt-controller@c000000 #interrupt-cells should be 3 instead of 4 because mt8565 only has a single CPU cluster and the 4th cell is used to encode the cluster phandle.

The arm,gic-v3.yaml bindings indicates:

  "#interrupt-cells":
    description: |
      Specifies the number of cells needed to encode an interrupt source.
      Must be a single cell with a value of at least 3.
      If the system requires describing PPI affinity, then the value must
      be at least 4.

This causes an error in PMU setup:

[    0.135234] hw perfevents: no irqs for PMU, sampling events not supported

Fixes: 5b2571f3 ("arm64: dts: mediatek: add mt8365 device-tree")

Signed-off-by: Neil Armstrong narmstrong@baylibre.com

Edited by Neil Armstrong

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