Scripted R-PDSO-G8 (HSOIC-8) for the LMR14030

Replacement for #662

EP (copper) size = 2.95x4.9mm, Mask size = 2.4x3.1mm (Solder mask defined exposed pad)

Script PR: https://github.com/pointhi/kicad-footprint-generator/pull/259

Datasheets:

• http://www.ti.com/lit/ds/symlink/lmr14030.pdf#page=28 (Defines ep size and layout)
• http://www.ti.com/lit/ml/msoi002j/msoi002j.pdf (package size definitions)

Texas_R-PDSO-G8_EP2.95x4.9mm_Mask2.4x3.1mm:
  size_source: 'http://www.ti.com/lit/ds/symlink/lmr14030.pdf#page=28, http://www.ti.com/lit/ml/msoi002j/msoi002j.pdf'
  custom_name_format: 'Texas_R-PDSO-G{pincount}_EP{ep_size_x:g}x{ep_size_y:g}mm_Mask{mask_size_x:g}x{mask_size_y:g}mm{vias:s}'
  body_size_x:
    minimum: 3.8
    maximum: 4
  body_size_y:
    minimum: 4.8
    maximum: 5

  overall_size_x:
    minimum: 5.8
    maximum: 6.2
  lead_width:
    minimum: 0.31
    maximum: 0.51
  lead_len:
    minimum: 0.4
    maximum: 1.27
  pitch: 1.27
  num_pins_x: 0
  num_pins_y: 4


  EP_size_x:
    minimum: 1.65
    maximum: 2.4
  EP_size_x_overwrite: 2.95
  EP_mask_x: 2.4

  EP_size_y:
    minimum: 2.65
    maximum: 3.1
  EP_size_y_overwrite: 4.9
  EP_mask_y: 3.1

  # EP_paste_coverage: 0.65
  EP_num_paste_pads: [2, 3]

  thermal_vias:
    count: [2, 3]
    drill: 0.2
    paste_via_clearance: 0.1
    EP_num_paste_pads: [2, 3]
    EP_paste_coverage: 0.75
    grid: [1.3, 1.3]
    paste_avoid_via: False