Show Redundant Vias/Segments/Dangling tracks in DRC (lp:#1809474)
Original report created by Victor W (vicw)
Kicad has a couple of useful clean up options that are accessible using;
Edit -> Clean Up Tracks and Vias.
However, our designs sometimes intentionally have stubs (for capacitance or
pcb filters) or redundant vias, which can sometimes make using this option
dangerous (ie; removing the redundant vias used to stitch high current
power traces together).
It would be really nice if these options were added to DRC so that we could
SEE exactly where these things are occurring, without also removing them.
By identifying those locations, we would be able to manually clean up the
design, without unintentionally removing essential design features.