Ki's Eagle importer ignores Eagle's DRC settings
Description
Eagle has 60+ settings in DRC, Ki has ~15. Something is getting clobbered in the importer. The importer ignores, truncates, whatever DRC is applied to a board, or misinterprets them.
Board vendors do kindly provide .drc files for their process capabilities.
It could look like this: (change to plain view)
description[en] = \n\n\n\n\n\n\n\n\n JLCBCB Design Rules\n
\nThe default Design Rules have been set to cover\na wide range of applications. Your particular design\nmay have different requirements, so please make the\nnecessary adjustments and save your customized\ndesign rules under a new name.\n layerSetup = (1_2+15_16) mtCopper = 0.035mm 0.0152mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.0152mm 0.035mm mtIsolate = 0.2104mm 1.065mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2104mm mdWireWire = 3.5mil mdWirePad = 5mil mdWireVia = 5mil mdPadPad = 5mil mdPadVia = 5mil mdViaVia = 8mil mdSmdPad = 0mil mdSmdVia = 0mil mdSmdSmd = 0mil mdViaViaSameLayer = 8mil mnLayersViaInSmd = 2 mdCopperDimension = 10mil mdDrill = 8mil mdSmdStop = 0mil msWidth = 3.5mil msDrill = 0.2mm msMicroVia = 9.99mm msBlindViaRatio = 0.500000 rvPadTop = 0.300000 rvPadInner = 0.300000 rvPadBottom = 0.300000 rvViaOuter = 0.250000 rvViaInner = 0.250000 rvMicroViaOuter = 0.250000 rvMicroViaInner = 0.250000 rlMinPadTop = 8mil rlMaxPadTop = 20mil rlMinPadInner = 8mil rlMaxPadInner = 20mil rlMinPadBottom = 8mil rlMaxPadBottom = 20mil rlMinViaOuter = 4mil rlMaxViaOuter = 20mil rlMinViaInner = 4mil rlMaxViaInner = 20mil rlMinMicroViaOuter = 4mil rlMaxMicroViaOuter = 20mil rlMinMicroViaInner = 4mil rlMaxMicroViaInner = 20mil psTop = -1 psBottom = -1 psFirst = -1 psElongationLong = 100 psElongationOffset = 100 mvStopFrame = 1.000000 mvCreamFrame = 0.000000 mlMinStopFrame = 2mil mlMaxStopFrame = 2mil mlMinCreamFrame = 0.5mil mlMaxCreamFrame = 3mil mlViaStopLimit = 100mil srRoundness = 0.000000 srMinRoundness = 0mil srMaxRoundness = 0mil slThermalIsolate = 10mil slThermalsForVias = 0 dpMaxLengthDifference = 10mm dpGapFactor = 2.500000 checkAngle = 0 checkFont = 1 checkRestrict = 1 checkStop = 1 checkValues = 0 checkNames = 1 checkWireStubs = 1 checkPolygonWidth = 0 useDiameter = 13 maxErrors = 999999
Steps to reproduce
- import a no-DRC error Eagle project
- run DRC
- choke on errors
KiCad Version
Application: KiCad PCB Editor x64 on x64
Version: 8.0.1, release build
Libraries:
wxWidgets 3.2.4
FreeType 2.12.1
HarfBuzz 8.3.0
FontConfig 2.14.2
Platform: Windows 10 (build 19045), 64-bit edition, 64 bit, Little endian, wxMSW
wxWidgets: 3.2.4 (wchar_t,wx containers)
Boost: 1.83.0
OCC: 7.7.1
Curl: 8.5.0-DEV
ngspice: 42
Compiler: Visual C++ 1936 without C++ ABI
Build settings: