RISC-V riscv32 embedded - Inline asm pseudo instructions and register aliases
The inline assembler seems not to support any pseudo instructions like LA, LI, CSRW which makes a 'translation' of startup code that is written in assembler a bit difficult.
Also it seems not all register name aliases are working, e.g. the alias "zero" for X0. And in the used register list in the end of an asm section aliases that were accepted in code didn't work. asm lui t0, 0x06 end['x5']; // t0 is alias of x5