Typo in 7.4. Extra "in"
VHDL-2019, clause 7.4, 4th paragraph reads:
If a signal name in the guarded signal specification denotes a slice of an array in of a composite signal, then the type mark in the specification shall be the same as the type mark in the subtype indication of the declaration of the array subelement.
In VHDL-2008 it reads:
If a signal name in the guarded signal specification denotes a slice of an array subelement of a composite signal, then the type mark in the specification shall be the same as the type mark in the subtype indication of the declaration of the array subelement.
As diff view (green = addition in 2019, red = deletion from 2008):
If a signal name in the guarded signal specification denotes a slice of an array subelementin of a composite signal, then the type mark in the specification shall be the same as the type mark in the subtype indication of the declaration of the array subelement.
Seeing Patrick's diff view of the paragraphs, it is clear we need to change it back to the VHDL-2008 text.