1. 31 Aug, 2020 3 commits
    • H.J. Lu's avatar
      Remove a duplicated line · 1ad6252f
      H.J. Lu authored
      There are:
      
      \item The 64-bit mantissa of arguments of type \code{long double}
      \item The 64-bit mantissa of arguments of type \code{long double}
      1ad6252f
    • H.J. Lu's avatar
      Document the %fs segment register as the thread pointer · c506311c
      H.J. Lu authored
      The %fs segment register is used to implement the thread pointer.  The
      linear address of the thread pointer is stored at offset 0 relative to
      the %fs segment register.
      c506311c
    • H.J. Lu's avatar
      Document Intel AMX · 72a164b9
      H.J. Lu authored
      Intel Advanced Matrix Extensions (Intel AMX) is a new programming
      paradigm consisting of two components: a set of 2-dimensional registers
      (tiles) representing sub-arrays from a larger 2-dimensional memory image,
      and accelerators able to operate on tiles.  Capability of Intel AMX
      implementation is enumerated by palettes.  Two palettes are supported:
      palette 0 represents the initialized state and palette 1 consists of
      8 tile registers of up to 1 KB size, which is controlled by a tile
      control register.
      72a164b9
  2. 03 Aug, 2020 3 commits
  3. 24 Jul, 2020 1 commit
  4. 04 May, 2020 1 commit
  5. 19 Jan, 2020 1 commit
  6. 11 Jul, 2019 1 commit
  7. 11 Apr, 2019 1 commit
    • H.J. Lu's avatar
      Document the maximum aligned boundary · 300bfb41
      H.J. Lu authored
      The maximum aligned boundary is the maximum alignment of all variable
      passed on stack and arguments passed on stack should be properly aligned.
      300bfb41
  8. 01 Mar, 2019 2 commits
  9. 12 Jun, 2018 1 commit
  10. 08 Feb, 2018 3 commits
  11. 29 Jan, 2018 13 commits
  12. 19 Nov, 2015 1 commit
  13. 18 Nov, 2015 5 commits
  14. 19 Feb, 2015 1 commit
  15. 12 Feb, 2015 3 commits