Commit 77566eb0 authored by Florian Weimer's avatar Florian Weimer
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Define additional x86-64 micro-architecture levels

The concept was described in this mailing list thread:

https://sourceware.org/pipermail/libc-alpha/2020-July/116135.html

The names of the CPU features come from this document:

Intel® 64 and IA-32 Architectures Software Developer’s Manual
Combined Volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D, and 4
Submitted: May 01, 2018, Last updated: May 27, 2020
https://software.intel.com/content/www/us/en/develop/download/intel-64-and-ia-32-architectures-sdm-combined-volumes-1-2a-2b-2c-2d-3a-3b-3c-3d-and-4.html
parent 077ea2bc
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