Commit 64f47426 authored by Eugeniy Paltsev's avatar Eugeniy Paltsev Committed by Alexey Brodkin

ARC: add defines of some cache and xCCM AUX registers

Signed-off-by: default avatarEugeniy Paltsev <[email protected]>
Signed-off-by: default avatarAlexey Brodkin <[email protected]ys.com>
parent e59c3797
......@@ -27,6 +27,12 @@
#define ARC_AUX_IC_PTAG 0x1E
#endif
#define ARC_BCR_IC_BUILD 0x77
#define AUX_AUX_CACHE_LIMIT 0x5D
#define ARC_AUX_NON_VOLATILE_LIMIT 0x5E
/* ICCM and DCCM auxiliary registers */
#define ARC_AUX_DCCM_BASE 0x18 /* DCCM Base Addr ARCv2 */
#define ARC_AUX_ICCM_BASE 0x208 /* ICCM Base Addr ARCv2 */
/* Timer related auxiliary registers */
#define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
......
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