Release Notes for ska-mid-cbf-tdc-correlator-v0.2.2 =================================================== Date and time generated: 2023-06-02 02:40:29.873016 Built with *Quartus Prime Version 22.4.0 Build 94 12/07/2022 Patches 0.25fw SC Pro Edition* Summary ------- * Configured for 4 receptors (AA0.5). * BITE has full 256GB DDR (Top Right). * LTA has own DDR (Bottom Right). * Single CT with own DDR (Bottom Left). * Added 100GbE connection to the HPS through the emac2 peripheral. * Upgrade Intel IP to Quartus 22.4. Requires patch for 256 DDR EMIF. * Bootloader updated. * Support added for Remote System Update of the QSPI flash. * Tone generator upgraded and enabled in BITE. * Receiver noise generator disabled in BITE. * LEDs now provide 100GbE port link status information, talon_status reporting. Fixes ----- * LSTV replay module faster performance. * Resampler Delay Tracker - CIP-1552. Bug when dithering enabled. - FIR coefficient quantisation optimised. Register Changes ---------------- * 100GbE PHY register set updated. * Packet Stream Repair - packet_rate width to 16b. * Resampler Delay Tracker - overflow bits added. * Visibility Packetiser - Change the "source_host_config" register identifier to "visibility_source_host_config" so that it doesn't clash with the RDMA register set of the same name. Changelog - Commit Messages --------------------------- Automatically generated changes since the last version (ska-mid-cbf-tdc-correlator-v0.2.0) according to commits. Commits filtered by files used in the build. For repository talon_dx at path . ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Add 25MHz emac2 clock to timing constraints file. * Merge branch 'cip1520_talon_status_cdc_update' into 'master' * Cip1520 talon status cdc update * See merge request SKA/TalonDX/FW/talon_dx!19 * Update Manifest.py - talon_status.cdc constraints moved into source code * Delete talon_status.sdc * Update talon_status.sdc * Merge branch 'quartus_22.4' into 'master' * Updates to Quartus 22.4 and addition of HPS emac2 connection to FPGA. * See merge request SKA/TalonDX/FW/talon_dx!18 * Merge branch 'master' into 'quartus_22.4' * Conflicts: * scripts/template_full_image.dts * updated the bootloader * Update the bootloader with the latest build from the meta-talondx * kirkstone branch. * (cherry picked from commit 87b2444aeadc4f04906c3c8c2c7db9252bae0366) * Merge branch 'remote_system_update' into 'master' * Adding support for remote system update (change to jic file generation and addition of .rpd file ) * See merge request SKA/TalonDX/FW/talon_dx!17 * Fix EMIF instanciation after removing the efficiency monitor which creates a different clock port name. * Add HPS ethernet (emac2) connection to the base partition as an AXI interface. Updating HPS system to quartus 22.4. * Update top right DDR EMIF to quartus 22.4 * Removing vunit_simulation directory and contents. * These files now in the fpga_tools repo. * fixed typos, clarified JIC output name * updated the bootloader * Update the bootloader with the latest build from the meta-talondx * kirkstone branch. * updated the post_module.tcl script to use the .pfg * The .pfg file will do the following: * generate the JIC file that supports the RSU feature * generate the core and hps portions of the bitstream for HPS first mode * added the quartus programming file * merge master * Merge branch 'update_bootloader' into 'master' * Updated the SPL bootloader to 2022 version * See merge request SKA/TalonDX/FW/talon_dx!16 * Updated the SPL bootloader * The hexfile is grabbed from the output of the kernel/uboot/wic * generation process. * Merge branch 'include_sof_in_package' into 'master' * added the .SOF to the output package in quartus_post_module * See merge request SKA/TalonDX/FW/talon_dx!14 * Merge branch 'overlay_update' into 'master' * updated the overlay template to include the i2c1 controller. * See merge request SKA/TalonDX/FW/talon_dx!15 * fixed the 'firmware-name' property in the overlay * updated the overlay to include the i2c1 controller. * Added the I2C1 controller, note that the the overlay relies on the kernel device tree to have disabled this node to begin with. * changed the overlay syntax to be more human readable accordig to dtc 1.5+. * added gmac2 to the overlay but commented it out until a design decision is made. * changed the final name of the artefact archive * moved the SOF to a new secondary output archive * added the .SOF to the output package in quartus_post_module * Adjust top-right (256GB) DDR4 EMIF Parameters * Expand available address with for the HP bus from 21b (2MB) to 31b (2GB). * Enable WEAK_PULL_UP_RESISTOR on o_gemac_rst_n pins so that the ethernet remains enabled druing FPGA configuration. * Remove timecode distribution signals from base partition. * Fix HPS GbE going down on FPGA load. - Add missing o_gemac_rst_n pins (set to '1'). * also Add missing gpio pins for HPS, i_fan_fail_n pin. * Upgrade hps system to Quartus 22.4 versions. For repository DeTrI at path ../DeTrI ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Fix some corner cases with using smaller registers on a wider bus, e.g. 32b reg on 64b bus. For repository bite at path ../bite ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Mux the EMIF interfaces for the LSTV generation and replay internally to BITE module. * One does only reads, the other only writes. Simple combinatorial mux to improve latency and reduce logic usage. For repository bite_fir_filter at path ../bite_fir_filter ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository bite_tone_gen at path ../bite_tone_gen ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Major re-write of tone generator. Using Numerically controlled oscillator from the resampler instead of Intel IP. For repository blockram_corner_turner at path ../blockram_corner_turner ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository circuit_switch at path ../circuit_switch ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository correlator at path ../correlator ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository ddr4_arbiter at path ../ddr4_arbiter ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository ddr4_corner_turner at path ../ddr4_corner_turner ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Delete unused constants. For repository dish_pkt_cap at path ../dish_pkt_cap ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository dish_pkt_gen at path ../dish_pkt_gen ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository dsp_lib at path ../dsp_lib ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Merge branch 'master' of gitlab.drao.nrc.ca:SKA/util/dsp_lib * Added conversion function to reduce wide stream to regular. For repository ethernet_100g at path ../ethernet_100g ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * synchronise status inputs to qsfp_led_ctrl * Merge branch 'cip1401_add_led_ctrl' into 'master' * WIP: CIP-1401 add led ctrl * See merge request SKA/util/ethernet_100g!8 * Update Intel 100GbE IP to version 19.2.1 (Quartus 22.4) * add link status led * add link status led * Update PHY register set according to latest documentation. For repository gaussian_noise at path ../gaussian_noise ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository histogram at path ../histogram ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository ic_ch16k at path ../ic_ch16k ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Merge commit '0e648ad1f60478ecffe924d63518b5c61a8c6df7' * Updated Test Benches for Signal Processing and All Tests Passing For repository jlib at path ../jlib ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository led_ctrl at path ../led_ctrl ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository lstv at path ../lstv ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Add missing overflow register fields to the resampler register set. Unused. * Enable tone generation, diable receiver noise. * Fix read-modify-write register access functions. For repository lstv_replay at path ../lstv_replay ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Minor improvements to the behaviour of the LSTV replay. * Burst 8 reads to improve DDR4 efficiency, especially through arbiter. * Reset the FIFO with the state machine so don't get old data out first. For repository packet_stream_repair at path ../packet_stream_repair ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * increase packet rate register width to 16 * reset frame address on start of packet. Fix for when packets not a power of two. For repository polarization_coupler at path ../polarization_coupler ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository rdma at path ../rdma_64b ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository resampler_delay_tracker at path ../resampler_delay_tracker ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Set default for RDT FIR filter coefficient wrapping to NOT. * CIP-1552 Add register bits to report output FIFO overflow conditions. Overflow triggers flagging until resampler is stopped - clearing the register bits. * CIP-1552 update the interpolator coefficients, format and quantisation. Each phase has the same gain. * Filter coefficients are optimised so that each of the 1024 phases has the same 'energy' i.e. the same gain when a DC value is passed through. * CIP-1552 add a filter select 'overflow due to dithering' control bit. * The when high the RDT filter takes the control bit and wraps the coefficients, instead of the step/eval control pausing evaluation to load an extra sample. This allows the dithering to wrap back quickly. * Only when the dithering will not go backwards do we suffer the extra cycle penalty. * Extend comments in rdt_nco.vhd For repository slim at path ../slim ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository spfrx_common at path ../spfrx_common ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository spfrx_packetizer at path ../spfrx_packetizer ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository sys_id at path ../sys_id ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Give the register set a semantic version of "1.0.0" For repository talon_status at path ../talon_status ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Update talon_status_clock_check.vhd * Update talon_status_clock_check.vhd * Update talon_status_clock_check.vhd * Updates for clock domain crossing * add talon status led For repository tdc_base at path ../tdc_base ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Merge branch 'cip1401_add_led_ctrl' into 'master' * WIP: CIP-1401 add LED ctrl * See merge request SKA/Mid.CBF/FW/base/tdc_base!5 * Up rev jtag_over_protocol IP to quartus 22.4 * Merge the 1GbE HPS ethernet connection into the SDP 100GbE transmit stream. NOTE: 100GbE clocks now assigned in base, and driven into the persona. * add link status led * add 100gbe link status and talon status leds For repository tdc_vcc_processing at path ../tdc_vcc_processing ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Updating system ID to report version 0.2.2 * Set number of receptors to 4 (not 8) for improved BITE performance. * With 4 receptors, BITE gets it's own DDR4 (no arbiter, so better replay performance). * Enable different connection to the external memory, depending on BITE and number of Corner turners. * CornerTurner0 always to Bottom-Left EMIF. * CornerTurner1 (if exists, more than 4 receptors) to Bottom-Right EMIF. * BITE (if present) to Top-Right EMIF. * Long Term Accumulator to Bottom-right EMIF if no Corner Turner 1, else shares Top-Right with BITE. * Split Visibility_transport into two entites a distributor and an aggregator. * The Aggregator ultimately belongs in the base partition (not FSP processing). * Reverse port direction of 100GbE clocks that are now input to the persona. Matching chages to tdc_base. * Tidy-up. * Configure for eight antennas (AA1) using top-right 256GB DDR for LTA and BITE. Bottom DDRs for Corner Turner. Disable RDMA. * Moved FSP histograms from LW register bus to HP bus. For repository vcc_ch20 at path ../vcc_ch20 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Updating with Tests T001 T003 passing but T002 is failing For repository visibility-packetiser at path ../visibility_packetiser ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * Push reverse flow control up to a drop module, that terminates the current packet. It also enforces maximum packet length. * Push reverse flow control out the o_meta_ack port. * Change the "source_host_config" register identifier to "visibility_source_host_config" so that it doesn't clash with the RDMA register set of the same name. * Add register readback as promised by the json file. For repository wideband_input_buffer at path ../wideband_input_buffer ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ No commits recorded since the last version tag (ska-mid-cbf-tdc-correlator-v0.2.0). For repository wk_lib at path ../wk_lib ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * restore old empty_to_keep() function and signature; change overload function to call the original one; fix clock period in tb file * make changes from comments on merge review * Update packet_merge to remove workaround for questasim. Requires Questasim 2022.4 (from Quartus 23.1) or later. * Merge branch 'master' of gitlab.drao.nrc.ca:SKA/util/wk_lib * Adding unsigned bit swap * Fix synthesis translate_on|off comment in packet_merge. * Add a packet_drop module to terminate a stop chain where backpressure cannot be passed to data source. * Improve reset behaviour of AXI4_bytise and packet_drop_fifos * fix f_count function for unsigned arguments, where the arguments were not the same size. * It would interpret them as signed when resizing the arguments to be the same length as the accum(ulator) argument. * Add sideband user data transport through the packet_merge module. Also output the packet length. Check that last signal is in the correct place, reset if it isn't (out of sync). Other reset improvements. * Merge remote-tracking branch 'origin/master' into packet_merge * More fix of header detatch for case where a whole word is detatched. * Update to Packet Merge module and testbench. * Make minimum depth for pkt_len FIFO of 32. * Extract store and forward, packet ingress into own entity. * Make Testbench self checking. With axi_stream_slave component. * Fix templating for axi_stream_master component. * Add new packet merge implementation. Move to eth_pkt_processing/template and generate for each bit-width. * Handle edge case in conversion functions empty_to_keep, and to_onehot, where the input slv length is zero. * Add ranges to sync fifo almost empty/full generics based on the depth to try catch bad parameterisations. * Merge branch 'bugfix--eth_pkt_proccessing/header_detach' into 'master' * bugfix header detach * See merge request SKA/util/wk_lib!4 * bugfix header detach * Add to_gray and from_gray functions to misc_tools_pkg. * Add a packet resize module to convert between 1G and 100G, update GMII to AXI4 Straming converter. * GMII gets independent tx clock and rx/general clock. * Add a packet dropping FIFO that will drop the packet being written if it goes full. * A synchronous version and a dual clock version. * Testbench and trial synth. Vunit to generate parameterisations. * Alternate implementations for stratix10 SDP RAM implementation for sim and synth. * Questa-sim complains about altsyncram for Stratix10. Commit Hashes ------------- * talon_dx: 833513da188bbe050b8716519b491f184d113526 * DeTrI: bb632cd90203bfab875ac799a9ca0e95581fd1aa * bite: 3c5e0c7ddc9bf4b2a189e70a7d70a89e3a962892 * bite_fir_filter: 575a39db2c5bba66e236ad96e452066e263e33e3 * bite_tone_gen: b25560b36dbcaef5bcd57209ab863920a016d392 * blockram_corner_turner: 5deaa7a22c5dfa3415bf21e4cb25c0cd5fab0a05 * circuit_switch: c05bdc9778baab0a1fc128a6ee865a5bc4f94946 * correlator: 7d5d4a97ae72f3447ad7b6c704847408679b8f2d * ddr4_arbiter: ca7524f484c6538239196589d44a49c3d0cb52e8 * ddr4_corner_turner: 20dc2dd2e237d413ef8e8277fc1f317094476768 * dish_pkt_cap: e41b3e7e797614d517458fdb76b17979a7432c08 * dish_pkt_gen: 63880021ea7fbbd3311f064df6bb43c1a8cd6897 * dsp_lib: bce0848d8e3efcfa25e86e28a8c4b7b93c294bde * ethernet_100g: a7335aed5c6ccb1d142b79a135ee022b2d134b59 * gaussian_noise: 9c337a516649818cdf344250aff271b9ae082fcf * histogram: 0fa23ddde1b308851b9b394a54c0dd604a5e4578 * ic_ch16k: d6c256941f45bb6b19213ba2caa6949b6c7ed07e * jlib: 763ba1f6b6a1c13684df9d4d6ea935978e0d13bb * led_ctrl: eb9d3d2376a1df89636913129161cb619e6441dd * lstv: 698174a590edeed14dceb5ecc7cb1f9ccbbb47e7 * lstv_replay: 108d04aa2b5c273f3111f85a4fb8542d53988850 * packet_stream_repair: d1e8fe11c2a4f65c80b6ba8970e009166a9330ff * polarization_coupler: 14ccae4043da377ed56e68d90e6860b48a189cda * rdma: 9d3da058c815ca16db3fb4cdab94685c7e2f9d23 * resampler_delay_tracker: ee56341e6c8e1b2cea05d5cfe5779092f2b01759 * slim: d036e18552898a41690b826c17208864dff31e87 * spfrx_common: 0d2f9e294546eceefaef6377f6a4e5953e7ffa3f * spfrx_packetizer: 64afb7670975506add2fe79c113aeec99550d87d * sys_id: 6c5115139b8f614c919c37464d61d3abf7e3393b * talon_status: 9a9257b8bb42ea4eb9cb7bf0527b12c1f0fa09ba * tdc_base: d8157eb10881014801dcaf331e415a5af38a8b3c * tdc_vcc_processing: 80eab83fee9b1e6ca12cd2c07b725949020299df * vcc_ch20: 322dcd4e540ef9e130e6deb6a7b34e8e27822aaf * visibility-packetiser: 35aeee87b9a56d07f85842d89e844f22d6c94f75 * wideband_input_buffer: 7c3f4187c9f8bf3abdec1af878ccc380647b1baf * wk_lib: 464986bcb99d7e2b696c29abb77b2665a1d43283