[PLIC][ENABLE register]Incorrect value written into 0xc002003, 0x11 instead of 0x1 written
When we try to write 0x1 into 0xc002003, 0x11 is written. This memory mapped address is the location of enable bit for interrupts 24 onward.
Dump: (gdb) load
`/home/rise/gitlab/shakti-sdk/software/examples/plic_applns/test/output/test.shakti' has changed; re-reading symbols.
Loading section .text.init, size 0xc2 lma 0x80000000
Loading section .text, size 0x3200 lma 0x800000c8
Loading section .rodata, size 0xf50 lma 0x800032c8
Loading section .sdata, size 0x38 lma 0x80004218
Start address 0x0000000080000000, load size 16970
Transfer rate: 14 KB/sec, 4242 bytes/write.
(gdb) si
0x0000000080000004 37 la t0, trap_entry
(gdb)
38 csrw mtvec, t0
(gdb)
42 li t6, PLICENABLE
(gdb)
43 andi t3,t3,0
(gdb)
44 addi t3,t3,1
(gdb)
45 sb t3, 0(t6)
(gdb)
46 sb t3, 1(t6)
(gdb)
47 sb t3, 2(t6)
(gdb)
48 sb t3, 3(t6)
(gdb)
51 li t6, PLICPRIORITY
(gdb)
52 andi t3,t3,0
(gdb) x/bx 0xc002003
0xc002003: 0x11
(gdb) x/bx 0xc002002
0xc002002: 0x01
(gdb) x/bx 0xc002001
0xc002001: 0x01
(gdb) x/bx 0xc002000
0xc002000: 0x01
Corresponding piece of assembly code that can reproduce this issue
#define PLICENABLE 0x0C002000
li t6, PLICENABLE
andi t3,t3,0
addi t3,t3,1
sb t3, 0(t6)
sb t3, 1(t6)
sb t3, 2(t6)
sb t3, 3(t6)