@@ -35,10 +35,15 @@ Oscilloscope was set to capture 10k samples at 250 MSPS. We measured both RMS-AC
|0.020|0.125|0.961 |
|0.010|0.099|0.722 |
**How to reduce noise**
While the level of internal noise is relatively low, it can be lowered even further with some post-processing of captured samples. A simple moving average filter is implemented in the FPGA and can be enabled to reduce noise.
Input signal for ETS is usually a high speed signal. The input signal must be repetitive and not correlated with sampling clock - this is because ETS uses random sampling points and multiple frame capture to reconstruct the signal.
ETS sampling is available on both analog inputs (CH1 and CH2). However the trigger source for ETS sampling is available only from CH1 and it is possible to adjust only the trigger voltage (but not trigger hysteresis or slope).
### How to capture signal in ETS mode
Before enabling the ETS mode, you can observe the signal on 4 ns capture speed to see if the signal is repetitive. Also adjust the voltage per division setting so that the signal will be displayed across the full grid.
To capture samples in the ETS mode: select 4 ns capture speed and enable ETS (please see the image below).