Rebase kernel's PCI subsystem with content from v6.16

PCI updates from v6.16:
     "Enumeration:
    
       - Print the actual delay time in pci_bridge_wait_for_secondary_bus()
         instead of assuming it was 1000ms (Wilfred Mallawa)
    
       - Revert 'iommu/amd: Prevent binding other PCI drivers to IOMMU PCI
         devices', which broke resume from system sleep on AMD platforms and
         has been fixed by other commits (Lukas Wunner)
    
      Resource management:
    
       - Remove mtip32xx use of pcim_iounmap_regions(), which is deprecated
         and unnecessary (Philipp Stanner)
    
       - Remove pcim_iounmap_regions() and pcim_request_region_exclusive()
         and related flags since all uses have been removed (Philipp
         Stanner)
    
       - Rework devres 'request' functions so they are no longer 'hybrid',
         i.e., their behavior no longer depends on whether
         pcim_enable_device or pci_enable_device() was used, and remove
         related code (Philipp Stanner)
    
       - Warn (not BUG()) about failure to assign optional resources (Ilpo
         Järvinen)
    
      Error handling:
    
       - Log the DPC Error Source ID only when it's actually valid (when
         ERR_FATAL or ERR_NONFATAL was received from a downstream device)
         and decode into bus/device/function (Bjorn Helgaas)
    
       - Determine AER log level once and save it so all related messages
         use the same level (Karolina Stolarek)
    
       - Use KERN_WARNING, not KERN_ERR, when logging PCIe Correctable
         Errors (Karolina Stolarek)
    
       - Ratelimit PCIe Correctable and Non-Fatal error logging, with sysfs
         controls on interval and burst count, to avoid flooding logs and
         RCU stall warnings (Jon Pan-Doh)
    
      Power management:
    
       - Increment PM usage counter when probing reset methods so we don't
         try to read config space of a powered-off device (Alex Williamson)
    
       - Set all devices to D0 during enumeration to ensure ACPI opregion is
         connected via _REG (Mario Limonciello)
    
      Bandwidth control:
    
       - Simplify link bandwidth controller by replacing the count of Link
         Bandwidth Management Status (LBMS) events with a PCI_LINK_LBMS_SEEN
         flag (Ilpo Järvinen)
    
       - Update the Link Speed after retraining, since the Link Speed may
         have changed (Ilpo Järvinen)
    
      PCIe native device hotplug:
    
       - Ignore Presence Detect Changed caused by DPC.
    
         pciehp already ignores Link Down/Up events caused by DPC, but on
         slots using in-band presence detect, DPC causes a spurious Presence
         Detect Changed event (Lukas Wunner)
    
       - Ignore Link Down/Up caused by Secondary Bus Reset.
    
         On hotplug ports using in-band presence detect, the reset causes a
         Presence Detect Changed event, which mistakenly caused teardown and
         re-enumeration of the device. Drivers may need to annotate code
         that resets their device (Lukas Wunner)
    
      Virtualization:
    
       - Add an ACS quirk for Loongson Root Ports that don't advertise ACS
         but don't allow peer-to-peer transactions between Root Ports; the
         quirk allows each Root Port to be in a separate IOMMU group (Huacai
         Chen)
    
      Endpoint framework:
    
       - For fixed-size BARs, retain both the actual size and the possibly
         larger size allocated to accommodate iATU alignment requirements
         (Jerome Brunet)
    
       - Simplify ctrl/SPAD space allocation and avoid allocating more space
         than needed (Jerome Brunet)
    
       - Correct MSI-X PBA offset calculations for DesignWare and Cadence
         endpoint controllers (Niklas Cassel)
    
       - Align the return value (number of interrupts) encoding for
         pci_epc_get_msi()/pci_epc_ops::get_msi() and
         pci_epc_get_msix()/pci_epc_ops::get_msix() (Niklas Cassel)
    
       - Align the nr_irqs parameter encoding for
         pci_epc_set_msi()/pci_epc_ops::set_msi() and
         pci_epc_set_msix()/pci_epc_ops::set_msix() (Niklas Cassel)
    
      Common host controller library:
    
       - Convert pci-host-common to a library so platforms that don't need
         native host controller drivers don't need to include these helper
         functions (Manivannan Sadhasivam)
    
      Apple PCIe controller driver:
    
       - Extract ECAM bridge creation helper from pci_host_common_probe() to
         separate driver-specific things like MSI from PCI things (Marc
         Zyngier)
    
       - Dynamically allocate RID-to_SID bitmap to prepare for SoCs with
         varying capabilities (Marc Zyngier)
    
       - Skip ports disabled in DT when setting up ports (Janne Grunau)
    
       - Add t6020 compatible string (Alyssa Rosenzweig)
    
       - Add T602x PCIe support (Hector Martin)
    
       - Directly set/clear INTx mask bits because T602x dropped the
         accessors that could do this without locking (Marc Zyngier)
    
       - Move port PHY registers to their own reg items to accommodate
         T602x, which moves them around; retain default offsets for existing
         DTs that lack phy%d entries with the reg offsets (Hector Martin)
    
       - Stop polling for core refclk, which doesn't work on T602x and the
         bootloader has already done anyway (Hector Martin)
    
       - Use gpiod_set_value_cansleep() when asserting PERST# in probe
         because we're allowed to sleep there (Hector Martin)
    
      Cadence PCIe controller driver:
    
       - Drop a runtime PM 'put' to resolve a runtime atomic count underflow
         (Hans Zhang)
    
       - Make the cadence core buildable as a module (Kishon Vijay Abraham I)
    
       - Add cdns_pcie_host_disable() and cdns_pcie_ep_disable() for use by
         loadable drivers when they are removed (Siddharth Vadapalli)
    
      Freescale i.MX6 PCIe controller driver:
    
       - Apply link training workaround only on IMX6Q, IMX6SX, IMX6SP
         (Richard Zhu)
    
       - Remove redundant dw_pcie_wait_for_link() from
         imx_pcie_start_link(); since the DWC core does this, imx6 only
         needs it when retraining for a faster link speed (Richard Zhu)
    
       - Toggle i.MX95 core reset to align with PHY powerup (Richard Zhu)
    
       - Set SYS_AUX_PWR_DET to work around i.MX95 ERR051624 erratum: in
         some cases, the controller can't exit 'L23 Ready' through Beacon or
         PERST# deassertion (Richard Zhu)
    
       - Clear GEN3_ZRXDC_NONCOMPL to work around i.MX95 ERR051586 erratum:
         controller can't meet 2.5 GT/s ZRX-DC timing when operating at 8
         GT/s, causing timeouts in L1 (Richard Zhu)
    
       - Wait for i.MX95 PLL lock before enabling controller (Richard Zhu)
    
       - Save/restore i.MX95 LUT for suspend/resume (Richard Zhu)
    
      Mobiveil PCIe controller driver:
    
       - Return bool (not int) for link-up check in
         mobiveil_pab_ops.link_up() and layerscape-gen4, mobiveil (Hans
         Zhang)
    
      NVIDIA Tegra194 PCIe controller driver:
    
       - Create debugfs directory for 'aspm_state_cnt' only when
         CONFIG_PCIEASPM is enabled, since there are no other entries (Hans
         Zhang)
    
      Qualcomm PCIe controller driver:
    
       - Add OF support for parsing DT 'eq-presets-<N>gts' property for lane
         equalization presets (Krishna Chaitanya Chundru)
    
       - Read Maximum Link Width from the Link Capabilities register if DT
         lacks 'num-lanes' property (Krishna Chaitanya Chundru)
    
       - Add Physical Layer 64 GT/s Capability ID and register offsets for
         8, 32, and 64 GT/s lane equalization registers (Krishna Chaitanya
         Chundru)
    
       - Add generic dwc support for configuring lane equalization presets
         (Krishna Chaitanya Chundru)
    
       - Add DT and driver support for PCIe on IPQ5018 SoC (Nitheesh Sekar)
    
      Renesas R-Car PCIe controller driver:
    
       - Describe endpoint BAR 4 as being fixed size (Jerome Brunet)
    
       - Document how to obtain R-Car V4H (r8a779g0) controller firmware
         (Yoshihiro Shimoda)
    
      Rockchip PCIe controller driver:
    
       - Reorder rockchip_pci_core_rsts because
         reset_control_bulk_deassert() deasserts in reverse order, to fix a
         link training regression (Jensen Huang)
    
       - Mark RK3399 as being capable of raising INTx interrupts (Niklas
         Cassel)
    
      Rockchip DesignWare PCIe controller driver:
    
       - Check only PCIE_LINKUP, not LTSSM status, to determine whether the
         link is up (Shawn Lin)
    
       - Increase N_FTS (used in L0s->L0 transitions) and enable ASPM L0s
         for Root Complex and Endpoint modes (Shawn Lin)
    
       - Hide the broken ATS Capability in rockchip_pcie_ep_init() instead
         of rockchip_pcie_ep_pre_init() so it stays hidden after PERST#
         resets non-sticky registers (Shawn Lin)
    
       - Call phy_power_off() before phy_exit() in rockchip_pcie_phy_deinit()
         (Diederik de Haas)
    
      Synopsys DesignWare PCIe controller driver:
    
       - Set PORT_LOGIC_LINK_WIDTH to one lane to make initial link training
         more robust; this will not affect the intended link width if all
         lanes are functional (Wenbin Yao)
    
       - Return bool (not int) for link-up check in dw_pcie_ops.link_up()
         and armada8k, dra7xx, dw-rockchip, exynos, histb, keembay,
         keystone, kirin, meson, qcom, qcom-ep, rcar_gen4, spear13xx,
         tegra194, uniphier, visconti (Hans Zhang)
    
      TI J721E PCIe driver:
    
       - Make j721e buildable as a loadable and removable module (Siddharth
         Vadapalli)
    
       - Fix j721e host/endpoint dependencies that result in link failures
         in some configs (Arnd Bergmann)
    
      Device tree bindings:
    
       - Add qcom DT binding for 'global' interrupt (PCIe controller and
         link-specific events) for ipq8074, ipq8074-gen3, ipq6018, sa8775p,
         sc7280, sc8180x sdm845, sm8150, sm8250, sm8350 (Manivannan
         Sadhasivam)
    
       - Add qcom DT binding for 8 MSI SPI interrupts for msm8998, ipq8074,
         ipq8074-gen3, ipq6018 (Manivannan Sadhasivam)
    
       - Add dw rockchip DT binding for rk3576 and rk3562 (Kever Yang)
    
       - Correct indentation and style of examples in brcm,stb-pcie,
         cdns,cdns-pcie-ep, intel,keembay-pcie-ep, intel,keembay-pcie,
         microchip,pcie-host, rcar-pci-ep, rcar-pci-host, xilinx-versal-cpm
         (Krzysztof Kozlowski)
    
       - Convert Marvell EBU (dove, kirkwood, armada-370, armada-xp) and
         armada8k from text to schema DT bindings (Rob Herring)
    
       - Remove obsolete .txt DT bindings for content that has been moved to
         schemas (Rob Herring)
    
       - Add qcom DT binding for MHI registers in IPQ5332, IPQ6018, IPQ8074
         and IPQ9574 (Varadarajan Narayanan)
    
       - Convert v3,v360epc-pci from text to DT schema binding (Rob Herring)
    
       - Change microchip,pcie-host DT binding to be 'dma-noncoherent' since
         PolarFire may be configured that way (Conor Dooley)
    
      Miscellaneous:
    
       - Drop 'pci' suffix from intel_mid_pci.c filename to match similar
         files (Andy Shevchenko)
    
       - All platforms with PCI have an MMU, so add PCI Kconfig dependency
         on MMU to simplify build testing and avoid inadvertent build
         regressions (Arnd Bergmann)
    
       - Update Krzysztof Wilczyński's email address in MAINTAINERS
         (Krzysztof Wilczyński)
    
       - Update Manivannan Sadhasivam's email address in MAINTAINERS
         (Manivannan Sadhasivam)"


JIRA: https://issues.redhat.com/browse/RHEL-107597

Signed-off-by: Myron Stowe <mstowe@redhat.com>
Edited by Myron Stowe

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