Nasm error types
./asm/assemble.c . Nasm just have these error, not many.
switch (m) {
case MERR_OPSIZEMISSING:
nasm_error(ERR_NONFATAL, "operation size not specified");
break;
case MERR_OPSIZEMISMATCH:
nasm_error(ERR_NONFATAL, "mismatch in operand sizes");
break;
case MERR_BRNOTHERE:
nasm_error(ERR_NONFATAL,
"broadcast not permitted on this operand");
break;
case MERR_BRNUMMISMATCH:
nasm_error(ERR_NONFATAL,
"mismatch in the number of broadcasting elements");
break;
case MERR_MASKNOTHERE:
nasm_error(ERR_NONFATAL,
"mask not permitted on this operand");
break;
case MERR_DECONOTHERE:
nasm_error(ERR_NONFATAL, "unsupported mode decorator for instruction");
break;
case MERR_BADCPU:
nasm_error(ERR_NONFATAL, "no instruction for this cpu level");
break;
case MERR_BADMODE:
nasm_error(ERR_NONFATAL, "instruction not supported in %d-bit mode",
bits);
break;
case MERR_ENCMISMATCH:
nasm_error(ERR_NONFATAL, "specific encoding scheme not available");
break;
case MERR_BADBND:
nasm_error(ERR_NONFATAL, "bnd prefix is not allowed");
break;
case MERR_BADREPNE:
nasm_error(ERR_NONFATAL, "%s prefix is not allowed",
(has_prefix(instruction, PPS_REP, P_REPNE) ?
"repne" : "repnz"));
break;
case MERR_REGSETSIZE:
nasm_error(ERR_NONFATAL, "invalid register set size");
break;
case MERR_REGSET:
nasm_error(ERR_NONFATAL, "register set not valid for operand");
break;
default:
nasm_error(ERR_NONFATAL,
"invalid combination of opcode and operands");