RISC-V: Hypervisor extension - Incorrect handling of sip
register (2)
Host environment
- Operating system: Ubuntu 22.04.5 LTS
- OS/kernel version: 6.8.0-79-generic
- Architecture: x86
- QEMU flavor: qemu-system-riscv64
- QEMU version: 10.1.0 (commit f8b2f64e)
- QEMU command line:
./qemu-system-riscv64 -nographic \ -machine virt \ -cpu rv64,g=on,c=on,h=on\ -m 512M \ -bios none \ -kernel "build/qemu/rvh_test.bin"
Emulated/Virtualized environment
- Operating system: - (baremetal)
- OS/kernel version: - (baremetal)
- Architecture: RISC-V (riscv64-softmmu)
Description of problem
I am executing tests for the riscv hypervisor extension from https://github.com/josecm/riscv-hyp-tests
.
In particular, test sip
in the check_xip_regs
category fails.
Following is the analysis of what the test is checking, what the test expects and what QEMU does.
What the test checks The test checks if interrupt can be delegated to S mode. For this, the test sets all the bits in mdelegate and hdelegate registers to mark that all interrupts can be delegated to lower privilege levels. After that, the test sets all the bits in the Machine Interrupt Pending register (mip) to mark all possible interrupts as pending. Finally, the test reads the Supervisor Interrupt Pending register (sip) to check what interrupts have been delegated to the S privilege level.
What the test expects The test expects that bits 1 (SSIP), 5 (STIP) and 9 (SEIP) are set, while the rest are all cleared.
What QEMU does QEMU also sets bit 13 in the sip register.
Comments Bit 13 should be 0 following the description of the sip register in the Supervisor-level ISA 1.12.
Steps to reproduce
Assuming a riscv64-unknown-elf-
cross compiler is installed in the machine:
git clone https://github.com/josecm/riscv-hyp-tests.git
cd riscv-hyp-tests
LOG_LEVEL=LOG_VERBOSE PLAT=qemu make
- Execute the previous command line.
Additional information
Example output:
...
VERBOSE: setting all in mip
...
sip FAILED
( - 0000000000002222 0000000000000222)
...