Micron Xccela (MT35x) NOR Flash wrong implementation in `hw/block/m25p80.c`

Goal

Xilinx committed one line adding the Micron MT35x in 6b3fac72 commit but the flash is quite different from what the rest of the code in hw/block/m25p80.c does.

Technical details

1. First, Micron has changed their ID since for their newer flash chips, it's not the same with Numonyx (0x20) anymore, it starts with 0x2C instead
2. This breaks the code that relies on get_man(s) == MAN_NUMONYX conditions
3. It misses Octal SPI handling as well
4. Instead of just one (two) non-volatile and volatile configuration registers it now implements 256 of them (but uses only 8 for now, for most needs we need only 2), thus even following the same code as with MAN_NUMONYX wouldn't help - at the very least READ/WRITE * REGISTER commands require now also the additional byte - register address
5. Bitmasks for features in configuration registers are also different.

Additional information

I see that in the fork they introduced a new entry - MAN_MICRON_OCTAL: - https://github.com/Xilinx/qemu/blob/master/hw/block/m25p80.c

Would be nice to make it more generic, probably to call just MAN_MICRON and set octal mode like quad mode in other flash implementations - via the configuration register flags, especially since they could be enabled and disabled on the fly.

Also the 256 configuration registers: https://github.com/Xilinx/qemu/commit/9b2fe1e36bfd8849bb3538161279cdff6efea325

cc @alistair23