When FIFO mode is enabled, the receive data available interrupt
(UART_IIR_RDI in code) should be triggered when the number of data
in FIFO is equal or larger than interrupt trigger level.
This patch changes the trigger level check to ensure multiple bytes
received from upper layer can trigger RDI interrupt correctly.
Cc: Joey Zheng <email@example.com>
Signed-off-by: Shunyong Yang <firstname.lastname@example.org>
Reviewed by: Kirti Wankhede <email@example.com>
Signed-off-by: Alex Williamson <firstname.lastname@example.org>