1. 06 Dec, 2018 1 commit
  2. 06 Mar, 2018 1 commit
  3. 02 Jan, 2018 1 commit
    • Suzuki K Poulose's avatar
      perf: ARM DynamIQ Shared Unit PMU support · 7520fa99
      Suzuki K Poulose authored
      Add support for the Cluster PMU part of the ARM DynamIQ Shared Unit (DSU).
      The DSU integrates one or more cores with an L3 memory system, control
      logic, and external interfaces to form a multicore cluster. The PMU
      allows counting the various events related to L3, SCU etc, along with
      providing a cycle counter.
      The PMU can be accessed via system registers, which are common
      to the cores in the same cluster. The PMU registers follow the
      semantics of the ARMv8 PMU, mostly, with the exception that
      the counters record the cluster wide events.
      This driver is mostly based on the ARMv8 and CCI PMU drivers.
      The driver only supports ARM64 at the moment. It can be extended
      to support ARM32 by providing register accessors like we do in
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
      Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
      Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
  4. 19 Oct, 2017 1 commit
  5. 03 Apr, 2017 1 commit
    • Agustin Vega-Frias's avatar
      perf: qcom: Add L3 cache PMU driver · 3071f13d
      Agustin Vega-Frias authored
      This adds a new dynamic PMU to the Perf Events framework to program
      and control the L3 cache PMUs in some Qualcomm Technologies SOCs.
      The driver supports a distributed cache architecture where the overall
      cache for a socket is comprised of multiple slices each with its own PMU.
      Access to each individual PMU is provided even though all CPUs share all
      the slices. User space needs to aggregate to individual counts to provide
      a global picture.
      The driver exports formatting and event information to sysfs so it can
      be used by the perf user space tools with the syntaxes:
         perf stat -a -e l3cache_0_0/read-miss/
         perf stat -a -e l3cache_0_0/event=0x21/
      Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
      Signed-off-by: default avatarAgustin Vega-Frias <agustinv@codeaurora.org>
      [will: fixed sparse issues]
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
  6. 08 Feb, 2017 1 commit
  7. 15 Sep, 2016 1 commit