1. 20 Jun, 2017 1 commit
    • Ingo Molnar's avatar
      sched/wait: Rename wait_queue_t => wait_queue_entry_t · ac6424b9
      Ingo Molnar authored
      Rename:
      
      	wait_queue_t		=>	wait_queue_entry_t
      
      'wait_queue_t' was always a slight misnomer: its name implies that it's a "queue",
      but in reality it's a queue *entry*. The 'real' queue is the wait queue head,
      which had to carry the name.
      
      Start sorting this out by renaming it to 'wait_queue_entry_t'.
      
      This also allows the real structure name 'struct __wait_queue' to
      lose its double underscore and become 'struct wait_queue_entry',
      which is the more canonical nomenclature for such data types.
      
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      ac6424b9
  2. 07 Apr, 2017 1 commit
  3. 30 Mar, 2017 1 commit
  4. 25 Oct, 2016 1 commit
    • Chris Wilson's avatar
      dma-buf: Rename struct fence to dma_fence · f54d1867
      Chris Wilson authored
      I plan to usurp the short name of struct fence for a core kernel struct,
      and so I need to rename the specialised fence/timeline for DMA
      operations to make room.
      
      A consensus was reached in
      https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html
      that making clear this fence applies to DMA operations was a good thing.
      Since then the patch has grown a bit as usage increases, so hopefully it
      remains a good thing!
      
      (v2...: rebase, rerun spatch)
      v3: Compile on msm, spotted a manual fixup that I broke.
      v4: Try again for msm, sorry Daniel
      
      coccinelle script:
      @@
      
      @@
      - struct fence
      + struct dma_fence
      @@
      
      @@
      - struct fence_ops
      + struct dma_fence_ops
      @@
      
      @@
      - struct fence_cb
      + struct dma_fence_cb
      @@
      
      @@
      - struct fence_array
      + struct dma_fence_array
      @@
      
      @@
      - enum fence_flag_bits
      + enum dma_fence_flag_bits
      @@
      
      @@
      (
      - fence_init
      + dma_fence_init
      |
      - fence_release
      + dma_fence_release
      |
      - fence_free
      + dma_fence_free
      |
      - fence_get
      + dma_fence_get
      |
      - fence_get_rcu
      + dma_fence_get_rcu
      |
      - fence_put
      + dma_fence_put
      |
      - fence_signal
      + dma_fence_signal
      |
      - fence_signal_locked
      + dma_fence_signal_locked
      |
      - fence_default_wait
      + dma_fence_default_wait
      |
      - fence_add_callback
      + dma_fence_add_callback
      |
      - fence_remove_callback
      + dma_fence_remove_callback
      |
      - fence_enable_sw_signaling
      + dma_fence_enable_sw_signaling
      |
      - fence_is_signaled_locked
      + dma_fence_is_signaled_locked
      |
      - fence_is_signaled
      + dma_fence_is_signaled
      |
      - fence_is_later
      + dma_fence_is_later
      |
      - fence_later
      + dma_fence_later
      |
      - fence_wait_timeout
      + dma_fence_wait_timeout
      |
      - fence_wait_any_timeout
      + dma_fence_wait_any_timeout
      |
      - fence_wait
      + dma_fence_wait
      |
      - fence_context_alloc
      + dma_fence_context_alloc
      |
      - fence_array_create
      + dma_fence_array_create
      |
      - to_fence_array
      + to_dma_fence_array
      |
      - fence_is_array
      + dma_fence_is_array
      |
      - trace_fence_emit
      + trace_dma_fence_emit
      |
      - FENCE_TRACE
      + DMA_FENCE_TRACE
      |
      - FENCE_WARN
      + DMA_FENCE_WARN
      |
      - FENCE_ERR
      + DMA_FENCE_ERR
      )
       (
       ...
       )
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarGustavo Padovan <gustavo.padovan@collabora.co.uk>
      Acked-by: default avatarSumit Semwal <sumit.semwal@linaro.org>
      Acked-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: Daniel Vetter's avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
      f54d1867
  5. 10 Aug, 2016 1 commit
  6. 02 Jun, 2016 1 commit
  7. 05 May, 2016 3 commits
  8. 02 May, 2016 6 commits
  9. 10 Feb, 2016 1 commit
    • Matthew Dawson's avatar
      drm/radeon: Avoid double gpu reset by adding a timeout on IB ring tests. · 04db4caf
      Matthew Dawson authored
      When the radeon driver resets a gpu, it attempts to test whether all the
      rings can successfully handle an IB.  If these rings fail to respond, the
      process will wait forever.  Another gpu reset can't happen at this point,
      as the current reset holds a lock required to do so.  Instead, make all
      the IB tests run with a timeout, so the system can attempt to recover
      in this case.
      
      While this doesn't fix the underlying issue with card resets failing, it
      gives the system a higher chance of recovering.  These timeouts have been
      confirmed to help both a Tathi and Hawaii card recover after a gpu reset.
      
      This also adds a new function, radeon_fence_wait_timeout, that behaves like
      fence_wait_timeout.  It is used instead of fence_wait_timeout as it continues
      to work during a reset.  radeon_fence_wait is changed to be implemented
      using this function.
      
      V2:
       - Changed the timeout to 1s, as the default 10s from radeon_wait_timeout was
      too long.  A timeout of 100ms was tested and found to be too short.
       - Changed radeon_fence_wait_timeout to behave more like fence_wait_timeout.
      Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: Matthew Dawson's avatarMatthew Dawson <matthew@mjdsystems.ca>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      04db4caf
  10. 27 Jan, 2016 1 commit
  11. 18 Dec, 2015 1 commit
  12. 04 Dec, 2015 1 commit
    • Lyude's avatar
      drm/radeon: Retry DDC probing on DVI on failure if we got an HPD interrupt · cb5d4166
      Lyude authored
      HPD signals on DVI ports can be fired off before the pins required for
      DDC probing actually make contact, due to the pins for HPD making
      contact first. This results in a HPD signal being asserted but DDC
      probing failing, resulting in hotplugging occasionally failing.
      
      This is somewhat rare on most cards (depending on what angle you plug
      the DVI connector in), but on some cards it happens constantly. The
      Radeon R5 on the machine used for testing this patch for instance, runs
      into this issue just about every time I try to hotplug a DVI monitor and
      as a result hotplugging almost never works.
      
      Rescheduling the hotplug work for a second when we run into an HPD
      signal with a failing DDC probe usually gives enough time for the rest
      of the connector's pins to make contact, and fixes this issue.
      Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: default avatarLyude <cpaul@redhat.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      cb5d4166
  13. 02 Dec, 2015 1 commit
  14. 23 Oct, 2015 1 commit
  15. 16 Jun, 2015 1 commit
  16. 28 May, 2015 2 commits
    • Denys Vlasenko's avatar
      radeon: Deinline indirect register accessor functions · 9e5acbc2
      Denys Vlasenko authored
      This patch deinlines indirect register accessor functions.
      
      These functions perform two mmio accesses, framed by spin lock/unlock.
      Spin lock/unlock by itself takes more than 50 cycles in ideal case
      (if lock is exclusively cached on current CPU).
      
      With this .config: http://busybox.net/~vda/kernel_config,
      after uninlining these functions have sizes and callsite counts
      as follows:
      
      r600_uvd_ctx_rreg: 111 bytes, 4 callsites
      r600_uvd_ctx_wreg: 113 bytes, 5 callsites
      eg_pif_phy0_rreg: 106 bytes, 13 callsites
      eg_pif_phy0_wreg: 108 bytes, 13 callsites
      eg_pif_phy1_rreg: 107 bytes, 13 callsites
      eg_pif_phy1_wreg: 108 bytes, 13 callsites
      rv370_pcie_rreg: 111 bytes, 21 callsites
      rv370_pcie_wreg: 113 bytes, 24 callsites
      r600_rcu_rreg: 111 bytes, 16 callsites
      r600_rcu_wreg: 113 bytes, 25 callsites
      cik_didt_rreg: 106 bytes, 10 callsites
      cik_didt_wreg: 107 bytes, 10 callsites
      tn_smc_rreg: 106 bytes, 126 callsites
      tn_smc_wreg: 107 bytes, 116 callsites
      eg_cg_rreg: 107 bytes, 20 callsites
      eg_cg_wreg: 108 bytes, 52 callsites
      
      Functions r100_mm_rreg() and r100_mm_rreg() have a fast path and
      a locked (slow) path. This patch deinlines only slow path.
      
      r100_mm_rreg_slow: 78 bytes, 2083 callsites
      r100_mm_wreg_slow: 81 bytes, 3570 callsites
      
      Reduction in code size is more than 65,000 bytes:
      
          text     data      bss       dec     hex filename
      85740176 22294680 20627456 128662312 7ab3b28 vmlinux.before
      85674192 22294776 20627456 128598664 7aa4288 vmlinux
      Signed-off-by: default avatarDenys Vlasenko <dvlasenk@redhat.com>
      Cc: Christian König <christian.koenig@amd.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      9e5acbc2
    • Christian König's avatar
      drm/radeon: stop using addr to check for BO move · 161ab658
      Christian König authored
      It is theoretically possible that a swapped out BO gets the
      same GTT address, but different backing pages while being swapped in.
      
      Instead just use another VA state to note updated areas.
      Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      161ab658
  17. 26 May, 2015 5 commits
  18. 07 May, 2015 1 commit
  19. 13 Apr, 2015 1 commit
  20. 27 Mar, 2015 1 commit
  21. 19 Mar, 2015 5 commits
  22. 22 Jan, 2015 3 commits