1. 21 Feb, 2019 2 commits
  2. 24 Jan, 2017 1 commit
    • Vineet Gupta's avatar
      ARC: smp-boot: Decouple Non masters waiting API from jump to entry point · bf02454a
      Vineet Gupta authored
      For run-on-reset SMP configs, non master cores call a routine which
      waits until Master gives it a "go" signal (currently using a shared
      mem flag). The same routine then jumps off the well known entry point of
      all non Master cores i.e. @first_lines_of_secondary
      
      This patch moves out the last part into one single place in early boot
      code.
      
      This is better in terms of absraction (the wait API only waits) and
      returns, leaving out the "jump off to" part.
      
      In actual implementation this requires some restructuring of the early
      boot code as well as Master now jumps to BSS setup explicitly,
      vs. falling thru into it before.
      
      Technically this patch doesn't cause any functional change, it just
      moves the ugly #ifdef'ry from assembly code to "C"
      Signed-off-by: 's avatarVineet Gupta <vgupta@synopsys.com>
      bf02454a
  3. 28 Oct, 2015 2 commits
  4. 22 Jun, 2015 1 commit
    • Vineet Gupta's avatar
      ARCv2: Support for ARCv2 ISA and HS38x cores · 1f6ccfff
      Vineet Gupta authored
      The notable features are:
          - SMP configurations of upto 4 cores with coherency
          - Optional L2 Cache and IO-Coherency
          - Revised Interrupt Architecture (multiple priorites, reg banks,
              auto stack switch, auto regfile save/restore)
          - MMUv4 (PIPT dcache, Huge Pages)
          - Instructions for
      	* 64bit load/store: LDD, STD
      	* Hardware assisted divide/remainder: DIV, REM
      	* Function prologue/epilogue: ENTER_S, LEAVE_S
      	* IRQ enable/disable: CLRI, SETI
      	* pop count: FFS, FLS
      	* SETcc, BMSKN, XBFU...
      Signed-off-by: 's avatarVineet Gupta <vgupta@synopsys.com>
      1f6ccfff
  5. 19 Jun, 2015 1 commit
  6. 13 Oct, 2014 1 commit
  7. 26 Jun, 2014 1 commit
  8. 03 Jun, 2014 1 commit
  9. 05 Apr, 2014 1 commit
    • Vineet Gupta's avatar
      ARC: [SMP] General Fixes · c3441edd
      Vineet Gupta authored
      -Pass the expected arg to non-boot park'ing routine
       (It worked so far because existing SMP backends don't use the arg)
      
      -CONFIG_DEBUG_PREEMPT warning
      c3441edd
  10. 16 Jan, 2014 1 commit
  11. 06 Nov, 2013 1 commit
    • Chen Gang's avatar
      arc: remove '__init' for first_lines_of_secondary() · 8f5d221b
      Chen Gang authored
      first_lines_of_secondary() is a '__init' function, but it may be called
      by __cpu_up() by _cpu_up() by cpu_up() which is a normal export symbol
      function. So recommend to remove '__init'.
      
      The related warning (with allmodconfig):
      
          MODPOST vmlinux.o
        WARNING: vmlinux.o(.text+0x315c): Section mismatch in reference from the function __cpu_up() to the function .init.text:first_lines_of_secondary()
        The function __cpu_up() references
        the function __init first_lines_of_secondary().
        This is often because __cpu_up lacks a __init
        annotation or the annotation of first_lines_of_secondary is wrong.
      Signed-off-by: 's avatarChen Gang <gang.chen@asianux.com>
      8f5d221b
  12. 12 Sep, 2013 1 commit
    • Noam Camus's avatar
      ARC: SMP failed to boot due to missing IVT setup · c3567f8a
      Noam Camus authored
      Commit 05b016ec "ARC: Setup Vector Table Base in early boot" moved
      the Interrupt vector Table setup out of arc_init_IRQ() which is called
      for all CPUs, to entry point of boot cpu only, breaking booting of others.
      
      Fix by adding the same to entry point of non-boot CPUs too.
      
      read_arc_build_cfg_regs() printing IVT Base Register didn't help the
      casue since it prints a synthetic value if zero which is totally bogus,
      so fix that to print the exact Register.
      
      [vgupta: Remove the now stale comment from header of arc_init_IRQ and
      also added the commentary for halt-on-reset]
      
      Cc: Gilad Ben-Yossef <gilad@benyossef.com>
      Cc: Cc: <stable@vger.kernel.org> #3.11
      Signed-off-by: 's avatarNoam Camus <noamc@ezchip.com>
      Signed-off-by: 's avatarVineet Gupta <vgupta@synopsys.com>
      Signed-off-by: 's avatarLinus Torvalds <torvalds@linux-foundation.org>
      c3567f8a
  13. 26 Jun, 2013 1 commit
  14. 15 Feb, 2013 2 commits
    • Vineet Gupta's avatar
      ARC: SMP support · 41195d23
      Vineet Gupta authored
      ARC common code to enable a SMP system + ISS provided SMP extensions.
      
      ARC700 natively lacks SMP support, hence some of the core features are
      are only enabled if SoCs have the necessary h/w pixie-dust. This
      includes:
      -Inter Processor Interrupts (IPI)
      -Cache coherency
      -load-locked/store-conditional
      ...
      
      The low level exception handling would be completely broken in SMP
      because we don't have hardware assisted stack switching. Thus a fair bit
      of this code is repurposing the MMU_SCRATCH reg for event handler
      prologues to keep them re-entrant.
      
      Many thanks to Rajeshwar Ranga for his initial "major" contributions to
      SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help
      with resurrecting that in 3.2 kernel (2012).
      
      Note that this platform code is again singleton design pattern - so
      multiple SMP platforms won't build at the moment - this deficiency is
      addressed in subsequent patches within this series.
      Signed-off-by: 's avatarVineet Gupta <vgupta@synopsys.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Rajeshwar Ranga <rajeshwar.ranga@gmail.com>
      Cc: Noam Camus <noamc@ezchip.com>
      Cc: Gilad Ben-Yossef <gilad@benyossef.com>
      41195d23
    • Vineet Gupta's avatar