Commit 968c61f7 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Drivers
   - RK805 Power Management IC (PMIC)
   - ROHM BD9571MWV-M MFD Power Management IC (PMIC)
   - Texas Instruments TPS68470 Power Management IC (PMIC) & LEDs

  New Device Support:
   - Add support for HiSilicon Hi6421v530 to hi6421-pmic-core
   - Add support for X-Powers AXP806 to axp20x
   - Add support for X-Powers AXP813 to axp20x
   - Add support for Intel Sunrise Point LPSS to intel-lpss-pci

  New Functionality:
   - Amend API to provide register layout; atmel-smc

  Fix-ups:
   - DT re-work; omap, nokia
   - Header file location change {I2C => MFD}; dm355evm_msp, tps65010
   - Fix chip ID formatting issue(s); rk808
   - Optionally register touchscreen devices; da9052-core
   - Documentation improvements; twl-core
   - Constification; rtsx_pcr, ab8500-core, da9055-i2c, da9052-spi
   - Drop unnecessary static declaration; max8925-i2c
   - Kconfig changes (missing deps and remove module support)
   - Slim down oversized licence statement; hi6421-pmic-core
   - Use managed resources (devm_*); lp87565
   - Supply proper error checking/handling; t7l66xb

  Bug Fixes:
   - Fix counter duplication issue; da9052-core
   - Fix potential NULL deference issue; max8998
   - Leave SPI-NOR write-protection bit alone; lpc_ich
   - Ensure device is put into reset during suspend; intel-lpss
   - Correct register offset variable size; omap-usb-tll"

* tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (61 commits)
  mfd: intel_soc_pmic: Differentiate between Bay and Cherry Trail CRC variants
  mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT
  dt-bindings: mfd: Add bindings for ZII RAVE devices
  mfd: omap-usb-tll: Fix register offsets
  mfd: da9052: Constify spi_device_id
  mfd: intel-lpss: Put I2C and SPI controllers into reset state on suspend
  mfd: da9055: Constify i2c_device_id
  mfd: intel-lpss: Add missing PCI ID for Intel Sunrise Point LPSS devices
  mfd: t7l66xb: Handle return value of clk_prepare_enable
  mfd: Add ROHM BD9571MWV-M PMIC DT bindings
  mfd: intel_soc_pmic_chtwc: Turn Kconfig option into a bool
  mfd: lp87565: Convert to use devm_mfd_add_devices()
  mfd: Add support for TPS68470 device
  mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Haswell/Broadwell
  mfd: syscon: atmel-smc: Add helper to retrieve register layout
  mfd: axp20x: Use correct platform device ID for many PEK
  dt-bindings: mfd: axp20x: Introduce bindings for AXP813
  mfd: axp20x: Add support for AXP813 PMIC
  dt-bindings: mfd: axp20x: Add AXP806 to supported list of chips
  mfd: Add ROHM BD9571MWV-M MFD PMIC driver
  ...
parents 9d71941d b01e9348
What: /sys/bus/iio/devices/iio:deviceX/in_count0_preset
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the current preset value. Writing sets the
preset value. Encoder counts continuously from 0 to preset
value, depending on direction (up/down).
What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the list possible quadrature modes.
What: /sys/bus/iio/devices/iio:deviceX/in_count0_quadrature_mode
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Configure the device counter quadrature modes:
- non-quadrature:
Encoder IN1 input servers as the count input (up
direction).
- quadrature:
Encoder IN1 and IN2 inputs are mixed to get direction
and count.
What: /sys/bus/iio/devices/iio:deviceX/in_count_polarity_available
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Reading returns the list possible active edges.
What: /sys/bus/iio/devices/iio:deviceX/in_count0_polarity
KernelVersion: 4.13
Contact: fabrice.gasnier@st.com
Description:
Configure the device encoder/counter active edge:
- rising-edge
- falling-edge
- both-edges
In non-quadrature mode, device counts up on active edge.
In quadrature mode, encoder counting scenarios are as follows:
----------------------------------------------------------------
| Active | Level on | IN1 signal | IN2 signal |
| edge | opposite |------------------------------------------
| | signal | Rising | Falling | Rising | Falling |
----------------------------------------------------------------
| Rising | High -> | Down | - | Up | - |
| edge | Low -> | Up | - | Down | - |
----------------------------------------------------------------
| Falling | High -> | - | Up | - | Down |
| edge | Low -> | - | Down | - | Up |
----------------------------------------------------------------
| Both | High -> | Down | Up | Up | Down |
| edges | Low -> | Up | Down | Down | Up |
----------------------------------------------------------------
......@@ -20,8 +20,8 @@ i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
retu-mfd: retu@1 {
compatible = "retu-mfd";
retu: retu@1 {
compatible = "nokia,retu";
reg = <0x1>;
};
};
STMicroelectronics STM32 Low-Power Timer quadrature encoder and counter
STM32 Low-Power Timer provides several counter modes. It can be used as:
- quadrature encoder to detect angular position and direction of rotary
elements, from IN1 and IN2 input signals.
- simple counter from IN1 input signal.
Must be a sub-node of an STM32 Low-Power Timer device tree node.
See ../mfd/stm32-lptimer.txt for details about the parent node.
Required properties:
- compatible: Must be "st,stm32-lptimer-counter".
- pinctrl-names: Set to "default".
- pinctrl-0: List of phandles pointing to pin configuration nodes,
to set IN1/IN2 pins in mode of operation for Low-Power
Timer input on external pin.
Example:
timer@40002400 {
compatible = "st,stm32-lptimer";
...
counter {
compatible = "st,stm32-lptimer-counter";
pinctrl-names = "default";
pinctrl-0 = <&lptim1_in_pins>;
};
};
STMicroelectronics STM32 Low-Power Timer Trigger
STM32 Low-Power Timer provides trigger source (LPTIM output) that can be used
by STM32 internal ADC and/or DAC.
Must be a sub-node of an STM32 Low-Power Timer device tree node.
See ../mfd/stm32-lptimer.txt for details about the parent node.
Required properties:
- compatible: Must be "st,stm32-lptimer-trigger".
- reg: Identify trigger hardware block. Must be 0, 1 or 2
respectively for lptimer1, lptimer2 or lptimer3
trigger output.
Example:
timer@40002400 {
compatible = "st,stm32-lptimer";
...
trigger@0 {
compatible = "st,stm32-lptimer-trigger";
reg = <0>;
};
};
......@@ -8,6 +8,7 @@ Required properties:
- compatible: Should be one of the following
"atmel,at91sam9260-smc", "syscon"
"atmel,sama5d3-smc", "syscon"
"atmel,sama5d2-smc", "syscon"
- reg: Contains offset/length value of the SMC memory
region.
......
......@@ -7,7 +7,14 @@ axp209 (X-Powers)
axp221 (X-Powers)
axp223 (X-Powers)
axp803 (X-Powers)
axp806 (X-Powers)
axp809 (X-Powers)
axp813 (X-Powers)
The AXP813 is 2 chips packaged into 1. The 2 chips do not share anything
other than the packaging. Pins are routed separately. As such they should
be treated as separate entities. The other half is an AC100 RTC/codec
combo chip. Please see ./ac100.txt for its bindings.
Required properties:
- compatible: should be one of:
......@@ -19,6 +26,7 @@ Required properties:
* "x-powers,axp803"
* "x-powers,axp806"
* "x-powers,axp809"
* "x-powers,axp813"
- reg: The I2C slave address or RSB hardware address for the AXP chip
- interrupt-parent: The parent interrupt controller
- interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
......@@ -28,12 +36,14 @@ Required properties:
Optional properties:
- x-powers,dcdc-freq: defines the work frequency of DC-DC in KHz
AXP152/20X: range: 750-1875, Default: 1.5 MHz
AXP22X/80X: range: 1800-4050, Default: 3 MHz
AXP22X/8XX: range: 1800-4050, Default: 3 MHz
- x-powers,drive-vbus-en: axp221 / axp223 only boolean, set this when the
N_VBUSEN pin is used as an output pin to control an external
regulator to drive the OTG VBus, rather then as an input pin
which signals whether the board is driving OTG VBus or not.
- x-powers,drive-vbus-en: boolean, set this when the N_VBUSEN pin is
used as an output pin to control an external
regulator to drive the OTG VBus, rather then
as an input pin which signals whether the
board is driving OTG VBus or not.
(axp221 / axp223 / axp813 only)
- x-powers,master-mode: Boolean (axp806 only). Set this when the PMIC is
wired for master mode. The default is slave mode.
......@@ -171,6 +181,36 @@ LDO_IO1 : LDO : ips-supply : GPIO 1
RTC_LDO : LDO : ips-supply : always on
SW : On/Off Switch : swin-supply
AXP813 regulators, type, and corresponding input supply names:
Regulator Type Supply Name Notes
--------- ---- ----------- -----
DCDC1 : DC-DC buck : vin1-supply
DCDC2 : DC-DC buck : vin2-supply : poly-phase capable
DCDC3 : DC-DC buck : vin3-supply : poly-phase capable
DCDC4 : DC-DC buck : vin4-supply
DCDC5 : DC-DC buck : vin5-supply : poly-phase capable
DCDC6 : DC-DC buck : vin6-supply : poly-phase capable
DCDC7 : DC-DC buck : vin7-supply
ALDO1 : LDO : aldoin-supply : shared supply
ALDO2 : LDO : aldoin-supply : shared supply
ALDO3 : LDO : aldoin-supply : shared supply
DLDO1 : LDO : dldoin-supply : shared supply
DLDO2 : LDO : dldoin-supply : shared supply
DLDO3 : LDO : dldoin-supply : shared supply
DLDO4 : LDO : dldoin-supply : shared supply
ELDO1 : LDO : eldoin-supply : shared supply
ELDO2 : LDO : eldoin-supply : shared supply
ELDO3 : LDO : eldoin-supply : shared supply
FLDO1 : LDO : fldoin-supply : shared supply
FLDO2 : LDO : fldoin-supply : shared supply
FLDO3 : LDO : fldoin-supply : shared supply
LDO_IO0 : LDO : ips-supply : GPIO 0
LDO_IO1 : LDO : ips-supply : GPIO 1
RTC_LDO : LDO : ips-supply : always on
SW : On/Off Switch : swin-supply
DRIVEVBUS : Enable output : drivevbus-supply : external regulator
Example:
axp209: pmic@34 {
......
* ROHM BD9571MWV Power Management Integrated Circuit (PMIC) bindings
Required properties:
- compatible : Should be "rohm,bd9571mwv".
- reg : I2C slave address.
- interrupt-parent : Phandle to the parent interrupt controller.
- interrupts : The interrupt line the device is connected to.
- interrupt-controller : Marks the device node as an interrupt controller.
- #interrupt-cells : The number of cells to describe an IRQ, should be 2.
The first cell is the IRQ number.
The second cell is the flags, encoded as trigger
masks from ../interrupt-controller/interrupts.txt.
- gpio-controller : Marks the device node as a GPIO Controller.
- #gpio-cells : Should be two. The first cell is the pin number and
the second cell is used to specify flags.
See ../gpio/gpio.txt for more information.
- regulators: : List of child nodes that specify the regulator
initialization data. Child nodes must be named
after their hardware counterparts:
- vd09
- vd18
- vd25
- vd33
- dvfs
Each child node is defined using the standard
binding for regulators.
Example:
pmic: pmic@30 {
compatible = "rohm,bd9571mwv";
reg = <0x30>;
interrupt-parent = <&gpio2>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
regulators {
dvfs: dvfs {
regulator-name = "dvfs";
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1030000>;
regulator-boot-on;
regulator-always-on;
};
};
};
......@@ -4,6 +4,14 @@ Required properties:
- compatible : Should be "dlg,da9052", "dlg,da9053-aa",
"dlg,da9053-ab", or "dlg,da9053-bb"
Optional properties:
- dlg,tsi-as-adc : Boolean, if set the X+, X-, Y+, Y- touchscreen
input lines are used as general purpose analogue
input.
- tsiref-supply: Phandle to the regulator, which provides the reference
voltage for the TSIREF pin. Must be provided when the
touchscreen pins are used for ADC purposes.
Sub-nodes:
- regulators : Contain the regulator nodes. The DA9052/53 regulators are
bound using their names as listed below:
......
* Device tree bindings for Nokia Retu and Tahvo multi-function device
Retu and Tahvo are a multi-function devices found on Nokia Internet
Tablets (770, N800 and N810). The Retu chip provides watchdog timer
and power button control functionalities while Tahvo chip provides
USB transceiver functionality.
Required properties:
- compatible: "nokia,retu" or "nokia,tahvo"
- reg: Specifies the CBUS slave address of the ASIC chip
- interrupts: The interrupt line the device is connected to
- interrupt-parent: The parent interrupt controller
Example:
cbus0 {
compatible = "i2c-cbus-gpio";
...
retu: retu@1 {
compatible = "nokia,retu";
interrupt-parent = <&gpio4>;
interrupts = <12 IRQ_TYPE_EDGE_RISING>;
reg = <0x1>;
};
};
RK8XX Power Management Integrated Circuit
The rk8xx family current members:
rk805
rk808
rk818
Required properties:
- compatible: "rockchip,rk808", "rockchip,rk818"
- compatible: "rockchip,rk805"
- compatible: "rockchip,rk808"
- compatible: "rockchip,rk818"
- reg: I2C slave address
- interrupt-parent: The parent interrupt controller.
- interrupts: the interrupt outputs of the controller.
......@@ -18,6 +21,14 @@ Optional properties:
- rockchip,system-power-controller: Telling whether or not this pmic is controlling
the system power.
Optional RK805 properties:
- vcc1-supply: The input supply for DCDC_REG1
- vcc2-supply: The input supply for DCDC_REG2
- vcc3-supply: The input supply for DCDC_REG3
- vcc4-supply: The input supply for DCDC_REG4
- vcc5-supply: The input supply for LDO_REG1 and LDO_REG2
- vcc6-supply: The input supply for LDO_REG3
Optional RK808 properties:
- vcc1-supply: The input supply for DCDC_REG1
- vcc2-supply: The input supply for DCDC_REG2
......@@ -56,6 +67,15 @@ by a child node of the 'regulators' node.
/* standard regulator bindings here */
};
Following regulators of the RK805 PMIC regulators are supported. Note that
the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO
number as described in RK805 datasheet.
- DCDC_REGn
- valid values for n are 1 to 4.
- LDO_REGn
- valid values for n are 1 to 3
Following regulators of the RK808 PMIC block are supported. Note that
the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO
number as described in RK808 datasheet.
......
STMicroelectronics STM32 Low-Power Timer
The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
functions:
- PWM output (with programmable prescaler, configurable polarity)
- Quadrature encoder, counter
- Trigger source for STM32 ADC/DAC (LPTIM_OUT)
Required properties:
- compatible: Must be "st,stm32-lptimer".
- reg: Offset and length of the device's register set.
- clocks: Phandle to the clock used by the LP Timer module.
- clock-names: Must be "mux".
- #address-cells: Should be '<1>'.
- #size-cells: Should be '<0>'.
Optional subnodes:
- pwm: See ../pwm/pwm-stm32-lp.txt
- counter: See ../iio/timer/stm32-lptimer-cnt.txt
- trigger: See ../iio/timer/stm32-lptimer-trigger.txt
Example:
timer@40002400 {
compatible = "st,stm32-lptimer";
reg = <0x40002400 0x400>;
clocks = <&timer_clk>;
clock-names = "mux";
#address-cells = <1>;
#size-cells = <0>;
pwm {
compatible = "st,stm32-pwm-lp";
pinctrl-names = "default";
pinctrl-0 = <&lppwm1_pins>;
};
trigger@0 {
compatible = "st,stm32-lptimer-trigger";
reg = <0>;
};
counter {
compatible = "st,stm32-lptimer-counter";
pinctrl-names = "default";
pinctrl-0 = <&lptim1_in_pins>;
};
};
* Device tree bindings for TI TPS61050/61052 Boost Converters
The TP61050/TPS61052 is a high-power "white LED driver". The
device provides LED, GPIO and regulator functionalities.
Required properties:
- compatible: "ti,tps61050" or "ti,tps61052"
- reg: Specifies the I2C slave address
Example:
i2c0 {
tps61052@33 {
compatible = "ti,tps61052";
reg = <0x33>;
};
};
Zodiac Inflight Innovations RAVE Supervisory Processor
RAVE Supervisory Processor communicates with SoC over UART. It is
expected that its Device Tree node is specified as a child of a node
corresponding to UART controller used for communication.
Required parent device properties:
- compatible: Should be one of:
- "zii,rave-sp-niu"
- "zii,rave-sp-mezz"
- "zii,rave-sp-esb"
- "zii,rave-sp-rdu1"
- "zii,rave-sp-rdu2"
- current-speed: Should be set to baud rate SP device is using
RAVE SP consists of the following sub-devices:
Device Description
------ -----------
rave-sp-wdt : Watchdog
rave-sp-nvmem : Interface to onborad EEPROM
rave-sp-backlight : Display backlight
rave-sp-hwmon : Interface to onboard hardware sensors
rave-sp-leds : Interface to onboard LEDs
rave-sp-input : Interface to onboard power button
Example of usage:
rdu {
compatible = "zii,rave-sp-rdu2";
current-speed = <1000000>;
watchdog {
compatible = "zii,rave-sp-watchdog";
};
};
Pincontrol driver for RK805 Power management IC.
RK805 has 2 pins which can be configured as GPIO output only.
Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
for details of the common pinctrl bindings used by client devices,
including the meaning of the phrase "pin configuration node".
Optional Pinmux properties:
--------------------------
Following properties are required if default setting of pins are required
at boot.
- pinctrl-names: A pinctrl state named per <pinctrl-binding.txt>.
- pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
<pinctrl-binding.txt>.
The pin configurations are defined as child of the pinctrl states node. Each
sub-node have following properties:
Required properties:
------------------
- #gpio-cells: Should be two. The first cell is the pin number and the
second is the GPIO flags.
- gpio-controller: Marks the device node as a GPIO controller.
- pins: List of pins. Valid values of pins properties are: gpio0, gpio1.
First 2 properties must be added in the RK805 PMIC node, documented in
Documentation/devicetree/bindings/mfd/rk808.txt
Optional properties:
-------------------
Following are optional properties defined as pinmux DT binding document
<pinctrl-bindings.txt>. Absence of properties will leave the configuration
on default.
function,
output-low,
output-high.
Valid values for function properties are: gpio.
Theres is also not customised properties for any GPIO.
Example:
--------
rk805: rk805@18 {
compatible = "rockchip,rk805";
...
gpio-controller;
#gpio-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>, <&rk805_default>;
rk805_default: pinmux {
gpio01 {
pins = "gpio0", "gpio1";
function = "gpio";
output-high;
};
};
};
STMicroelectronics STM32 Low-Power Timer PWM
STM32 Low-Power Timer provides single channel PWM.
Must be a sub-node of an STM32 Low-Power Timer device tree node.
See ../mfd/stm32-lptimer.txt for details about the parent node.
Required parameters:
- compatible: Must be "st,stm32-pwm-lp".
Optional properties:
- pinctrl-names: Set to "default".
- pinctrl-0: Phandle pointing to pin configuration node for PWM.
Example:
timer@40002400 {
compatible = "st,stm32-lptimer";
...
pwm {
compatible = "st,stm32-pwm-lp";
pinctrl-names = "default";
pinctrl-0 = <&lppwm1_pins>;
};
};
......@@ -11432,6 +11432,17 @@ L: linux-serial@vger.kernel.org
S: Odd Fixes
F: drivers/tty/serial/rp2.*
ROHM MULTIFUNCTION BD9571MWV-M PMIC DEVICE DRIVERS
M: Marek Vasut <marek.vasut+renesas@gmail.com>
L: linux-kernel@vger.kernel.org
L: linux-renesas-soc@vger.kernel.org
S: Supported
F: drivers/mfd/bd9571mwv.c
F: drivers/regulator/bd9571mwv-regulator.c
F: drivers/gpio/gpio-bd9571mwv.c
F: include/linux/mfd/bd9571mwv.h
F: Documentation/devicetree/bindings/mfd/bd9571mwv.txt
ROSE NETWORK LAYER
M: Ralf Baechle <ralf@linux-mips.org>
L: linux-hams@vger.kernel.org
......
......@@ -15,8 +15,8 @@
>;
#address-cells = <1>;
#size-cells = <0>;
retu_mfd: retu@1 {
compatible = "retu-mfd";
retu: retu@1 {
compatible = "nokia,retu";
interrupt-parent = <&gpio4>;
interrupts = <12 IRQ_TYPE_EDGE_RISING>;
reg = <0x1>;
......
......@@ -30,7 +30,7 @@
i2c@80004000 {
tps61052@33 {
compatible = "tps61052";
compatible = "ti,tps61052";
reg = <0x33>;
};
......
......@@ -14,7 +14,7 @@
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/i2c/tps65010.h>
#include <linux/mfd/tps65010.h>
#include "board-h2.h"
#include "mmc.h"
......
......@@ -28,7 +28,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/i2c/tps65010.h>
#include <linux/mfd/tps65010.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <linux/platform_data/gpio-omap.h>
......
......@@ -14,7 +14,7 @@
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/i2c/tps65010.h>
#include <linux/mfd/tps65010.h>
#include "common.h"
#include "board-h3.h"
......
......@@ -28,7 +28,7 @@
#include <linux/mtd/physmap.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/i2c/tps65010.h>
#include <linux/mfd/tps65010.h>
#include <linux/smc91x.h>
#include <linux/omapfb.h>
#include <linux/platform_data/gpio-omap.h>
......
......@@ -233,10 +233,10 @@ static struct platform_device nokia770_cbus_device = {
static struct i2c_board_info nokia770_i2c_board_info_2[] __initdata = {
{
I2C_BOARD_INFO("retu-mfd", 0x01),
I2C_BOARD_INFO("retu", 0x01),
},
{
I2C_BOARD_INFO("tahvo-mfd", 0x02),
I2C_BOARD_INFO("tahvo", 0x02),
},
};
......
......@@ -38,7 +38,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c/tps65010.h>
#include <linux/mfd/tps65010.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/platform_data/omap1_bl.h>
......
......@@ -29,7 +29,7 @@
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/i2c/twl.h>
#include <linux/mfd/twl.h>
#include <linux/i2c-omap.h>
#include <linux/reboot.h>
#include <linux/irqchip/irq-omap-intc.h>
......
......@@ -16,7 +16,7 @@
#include <linux/err.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/i2c/twl.h>
#include <linux/mfd/twl.h>
#include "soc.h"
#include "voltage.h"
......
......@@ -17,7 +17,7 @@
#include <linux/cpufreq.h>
#include <linux/gpio.h>
#include <linux/i2c/tps65010.h>
#include <linux/mfd/tps65010.h>
#include <plat/cpu-freq.h>
#include <mach/gpio-samsung.h>
......
......@@ -24,7 +24,7 @@
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/i2c/tps65010.h>
#include <linux/mfd/tps65010.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
......
......@@ -35,7 +35,7 @@
#include <linux/of.h>
#include <linux/irqdomain.h>
#include <linux/i2c/twl.h>
#include <linux/mfd/twl.h>
/*
* The GPIO "subchip" supports 18 GPIOs which can be configured as
......