Commit 6eaac34f authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'linux-watchdog-4.19-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - add MEN 16z069 IP-Core driver

 - renesas-wdt: add support for the R8A77990 wdt

 - stm32_iwdg: Add stm32mp1 support and pclk feature

 - sp805_wdt, orion_wdt, sprd_wdt: several improvements

 - imx2_wdt, stmp3xxx: switch to SPDX identifier

* tag 'linux-watchdog-4.19-rc1' of git://www.linux-watchdog.org/linux-watchdog:
  watchdog: fix dependencies of menz69_wdt.o
  watchdog: sp805: Add clock-frequency property
  watchdog: add driver for the MEN 16z069 IP-Core
  watchdog: sprd_wdt: Remove redundant dev_err call in sprd_wdt_probe()
  watchdog: stmp3xxx: Switch to SPDX identifier
  watchdog: imx2_wdt: Switch to SPDX identifier
  watchdog: sp805: set WDOG_HW_RUNNING when appropriate
  watchdog: sp805: add 'timeout-sec' DT property support
  dt-bindings: watchdog: Add optional 'timeout-sec' property for sp805
  dt-bindings: watchdog: Consolidate SP805 binding docs
  watchdog: orion_wdt: Mark watchdog as active when running at probe
  watchdog: stm32: add pclk feature for stm32mp1
  dt-bindings: watchdog: add stm32mp1 support
  dt-bindings: watchdog: renesas-wdt: Add support for the R8A77990 wdt
parents 13bf2cf9 12aea518
ARM AMBA Primecell SP805 Watchdog
SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
can be used to identify the peripheral type, vendor, and revision.
This value can be used for driver matching.
As SP805 WDT is a primecell IP, it follows the base bindings specified in
'arm/primecell.txt'
Required properties:
- compatible: Should be "arm,sp805" & "arm,primecell"
- reg: Should contain location and length for watchdog timer register.
- interrupts: Should contain the list of watchdog timer interrupts.
- clocks: clocks driving the watchdog timer hardware. This list should be 2
clocks. With 2 clocks, the order is wdogclk clock, apb_pclk.
- compatible: Should be "arm,sp805" & "arm,primecell"
- reg: Should contain location and length for watchdog timer register
- clocks: Clocks driving the watchdog timer hardware. This list should be
2 clocks. With 2 clocks, the order is wdog_clk, apb_pclk
wdog_clk can be equal to or be a sub-multiple of the apb_pclk
frequency
- clock-names: Shall be "wdog_clk" for first clock and "apb_pclk" for the
second one
Optional properties:
- interrupts: Should specify WDT interrupt number
- timeout-sec: Should specify default WDT timeout in seconds. If unset, the
default timeout is determined by the driver
Example:
watchdog@66090000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x66090000 0x1000>;
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb_pclk>,<&apb_pclk>;
clock-names = "wdogclk", "apb_pclk";
clocks = <&wdt_clk>, <&apb_pclk>;
clock-names = "wdog_clk", "apb_pclk";
};
......@@ -16,6 +16,7 @@ Required properties:
- "renesas,r8a7796-wdt" (R-Car M3-W)
- "renesas,r8a77965-wdt" (R-Car M3-N)
- "renesas,r8a77970-wdt" (R-Car V3M)
- "renesas,r8a77990-wdt" (R-Car E3)
- "renesas,r8a77995-wdt" (R-Car D3)
- "renesas,r7s72100-wdt" (RZ/A1)
The generic compatible string must be:
......
* ARM SP805 Watchdog Timer (WDT) Controller
SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
can be used to identify the peripheral type, vendor, and revision.
This value can be used for driver matching.
As SP805 WDT is a primecell IP, it follows the base bindings specified in
'arm/primecell.txt'
Required properties:
- compatible : Should be "arm,sp805-wdt", "arm,primecell"
- reg : Base address and size of the watchdog timer registers.
- clocks : From common clock binding.
First clock is PCLK and the second is WDOGCLK.
WDOGCLK can be equal to or be a sub-multiple of the PCLK frequency.
- clock-names : From common clock binding.
Shall be "apb_pclk" for first clock and "wdog_clk" for the
second one.
Optional properties:
- interrupts : Should specify WDT interrupt number.
Examples:
cluster1_core0_watchdog: wdt@c000000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
};
......@@ -2,9 +2,15 @@ STM32 Independent WatchDoG (IWDG)
---------------------------------
Required properties:
- compatible: "st,stm32-iwdg"
- reg: physical base address and length of the registers set for the device
- clocks: must contain a single entry describing the clock input
- compatible: Should be either:
- "st,stm32-iwdg"
- "st,stm32mp1-iwdg"
- reg: Physical base address and length of the registers set for the device
- clocks: Reference to the clock entry lsi. Additional pclk clock entry
is required only for st,stm32mp1-iwdg.
- clock-names: Name of the clocks used.
"lsi" for st,stm32-iwdg
"lsi", "pclk" for st,stm32mp1-iwdg
Optional Properties:
- timeout-sec: Watchdog timeout value in seconds.
......@@ -15,5 +21,6 @@ iwdg: watchdog@40003000 {
compatible = "st,stm32-iwdg";
reg = <0x40003000 0x400>;
clocks = <&clk_lsi>;
clock-names = "lsi";
timeout-sec = <32>;
};
......@@ -9427,6 +9427,12 @@ F: drivers/leds/leds-menf21bmc.c
F: drivers/hwmon/menf21bmc_hwmon.c
F: Documentation/hwmon/menf21bmc
MEN Z069 WATCHDOG DRIVER
M: Johannes Thumshirn <jth@kernel.org>
L: linux-watchdog@vger.kernel.org
S: Maintained
F: drivers/watchdog/menz069_wdt.c
MESON AO CEC DRIVER FOR AMLOGIC SOCS
M: Neil Armstrong <narmstrong@baylibre.com>
L: linux-media@lists.freedesktop.org
......
......@@ -161,6 +161,16 @@ config MENF21BMC_WATCHDOG
This driver can also be built as a module. If so the module
will be called menf21bmc_wdt.
config MENZ069_WATCHDOG
tristate "MEN 16Z069 Watchdog"
depends on MCB
select WATCHDOG_CORE
help
Say Y here to include support for the MEN 16Z069 Watchdog.
This driver can also be built as a module. If so the module
will be called menz069_wdt.
config TANGOX_WATCHDOG
tristate "Sigma Designs SMP86xx/SMP87xx watchdog"
select WATCHDOG_CORE
......
......@@ -215,4 +215,5 @@ obj-$(CONFIG_MAX77620_WATCHDOG) += max77620_wdt.o
obj-$(CONFIG_ZIIRAVE_WATCHDOG) += ziirave_wdt.o
obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o
obj-$(CONFIG_MENF21BMC_WATCHDOG) += menf21bmc_wdt.o
obj-$(CONFIG_MENZ069_WATCHDOG) += menz69_wdt.o
obj-$(CONFIG_RAVE_SP_WATCHDOG) += rave-sp-wdt.o
// SPDX-License-Identifier: GPL-2.0
/*
* Watchdog driver for IMX2 and later processors
*
......@@ -7,10 +8,6 @@
* some parts adapted by similar drivers from Darius Augulis and Vladimir
* Zapolskiy, additional improvements by Wim Van Sebroeck.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*
* NOTE: MX1 has a slightly different Watchdog than MX2 and later:
*
* MX1: MX2+:
......
// SPDX-License-Identifier: GPL-2.0
/*
* Watchdog driver for the MEN z069 IP-Core
*
* Copyright (C) 2018 Johannes Thumshirn <jth@kernel.org>
*/
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/mcb.h>
#include <linux/module.h>
#include <linux/watchdog.h>
struct men_z069_drv {
struct watchdog_device wdt;
void __iomem *base;
struct resource *mem;
};
#define MEN_Z069_WTR 0x10
#define MEN_Z069_WTR_WDEN BIT(15)
#define MEN_Z069_WTR_WDET_MASK 0x7fff
#define MEN_Z069_WVR 0x14
#define MEN_Z069_TIMER_FREQ 500 /* 500 Hz */
#define MEN_Z069_WDT_COUNTER_MIN 1
#define MEN_Z069_WDT_COUNTER_MAX 0x7fff
#define MEN_Z069_DEFAULT_TIMEOUT 30
static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
static int men_z069_wdt_start(struct watchdog_device *wdt)
{
struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
u16 val;
val = readw(drv->base + MEN_Z069_WTR);
val |= MEN_Z069_WTR_WDEN;
writew(val, drv->base + MEN_Z069_WTR);
return 0;
}
static int men_z069_wdt_stop(struct watchdog_device *wdt)
{
struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
u16 val;
val = readw(drv->base + MEN_Z069_WTR);
val &= ~MEN_Z069_WTR_WDEN;
writew(val, drv->base + MEN_Z069_WTR);
return 0;
}
static int men_z069_wdt_ping(struct watchdog_device *wdt)
{
struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
u16 val;
/* The watchdog trigger value toggles between 0x5555 and 0xaaaa */
val = readw(drv->base + MEN_Z069_WVR);
val ^= 0xffff;
writew(val, drv->base + MEN_Z069_WVR);
return 0;
}
static int men_z069_wdt_set_timeout(struct watchdog_device *wdt,
unsigned int timeout)
{
struct men_z069_drv *drv = watchdog_get_drvdata(wdt);
u16 reg, val, ena;
wdt->timeout = timeout;
val = timeout * MEN_Z069_TIMER_FREQ;
reg = readw(drv->base + MEN_Z069_WVR);
ena = reg & MEN_Z069_WTR_WDEN;
reg = ena | val;
writew(reg, drv->base + MEN_Z069_WTR);
return 0;
}
static const struct watchdog_info men_z069_info = {
.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
.identity = "MEN z069 Watchdog",
};
static const struct watchdog_ops men_z069_ops = {
.owner = THIS_MODULE,
.start = men_z069_wdt_start,
.stop = men_z069_wdt_stop,
.ping = men_z069_wdt_ping,
.set_timeout = men_z069_wdt_set_timeout,
};
static struct watchdog_device men_z069_wdt = {
.info = &men_z069_info,
.ops = &men_z069_ops,
.timeout = MEN_Z069_DEFAULT_TIMEOUT,
.min_timeout = 1,
.max_timeout = MEN_Z069_WDT_COUNTER_MAX / MEN_Z069_TIMER_FREQ,
};
static int men_z069_probe(struct mcb_device *dev,
const struct mcb_device_id *id)
{
struct men_z069_drv *drv;
struct resource *mem;
drv = devm_kzalloc(&dev->dev, sizeof(struct men_z069_drv), GFP_KERNEL);
if (!drv)
return -ENOMEM;
mem = mcb_request_mem(dev, "z069-wdt");
if (IS_ERR(mem))
return PTR_ERR(mem);
drv->base = devm_ioremap(&dev->dev, mem->start, resource_size(mem));
if (drv->base == NULL)
goto release_mem;
drv->mem = mem;
drv->wdt = men_z069_wdt;
watchdog_init_timeout(&drv->wdt, 0, &dev->dev);
watchdog_set_nowayout(&drv->wdt, nowayout);
watchdog_set_drvdata(&drv->wdt, drv);
drv->wdt.parent = &dev->dev;
mcb_set_drvdata(dev, drv);
return watchdog_register_device(&men_z069_wdt);
release_mem:
mcb_release_mem(mem);
return -ENOMEM;
}
static void men_z069_remove(struct mcb_device *dev)
{
struct men_z069_drv *drv = mcb_get_drvdata(dev);
watchdog_unregister_device(&drv->wdt);
mcb_release_mem(drv->mem);
}
static const struct mcb_device_id men_z069_ids[] = {
{ .device = 0x45 },
{ }
};
MODULE_DEVICE_TABLE(mcb, men_z069_ids);
static struct mcb_driver men_z069_driver = {
.driver = {
.name = "z069-wdt",
.owner = THIS_MODULE,
},
.probe = men_z069_probe,
.remove = men_z069_remove,
.id_table = men_z069_ids,
};
module_mcb_driver(men_z069_driver);
MODULE_AUTHOR("Johannes Thumshirn <jth@kernel.org>");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("mcb:16z069");
......@@ -581,6 +581,8 @@ static int orion_wdt_probe(struct platform_device *pdev)
*/
if (!orion_wdt_enabled(&dev->wdt))
orion_wdt_stop(&dev->wdt);
else
set_bit(WDOG_HW_RUNNING, &dev->wdt.status);
/* Request the IRQ only after the watchdog is disabled */
irq = platform_get_irq(pdev, 0);
......
......@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
#include <linux/acpi.h>
#include <linux/device.h>
#include <linux/resource.h>
#include <linux/amba/bus.h>
......@@ -22,6 +23,7 @@
#include <linux/math64.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/of.h>
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
......@@ -42,6 +44,7 @@
/* control register masks */
#define INT_ENABLE (1 << 0)
#define RESET_ENABLE (1 << 1)
#define ENABLE_MASK (INT_ENABLE | RESET_ENABLE)
#define WDTINTCLR 0x00C
#define WDTRIS 0x010
#define WDTMIS 0x014
......@@ -65,6 +68,7 @@ struct sp805_wdt {
spinlock_t lock;
void __iomem *base;
struct clk *clk;
u64 rate;
struct amba_device *adev;
unsigned int load_val;
};
......@@ -74,13 +78,22 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout,
"Set to 1 to keep watchdog running after device release");
/* returns true if wdt is running; otherwise returns false */
static bool wdt_is_running(struct watchdog_device *wdd)
{
struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL);
return (wdtcontrol & ENABLE_MASK) == ENABLE_MASK;
}
/* This routine finds load value that will reset system in required timout */
static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
{
struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
u64 load, rate;
rate = clk_get_rate(wdt->clk);
rate = wdt->rate;
/*
* sp805 runs counter with given value twice, after the end of first
......@@ -106,9 +119,7 @@ static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
static unsigned int wdt_timeleft(struct watchdog_device *wdd)
{
struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
u64 load, rate;
rate = clk_get_rate(wdt->clk);
u64 load;
spin_lock(&wdt->lock);
load = readl_relaxed(wdt->base + WDTVALUE);
......@@ -118,7 +129,7 @@ static unsigned int wdt_timeleft(struct watchdog_device *wdd)
load += wdt->load_val + 1;
spin_unlock(&wdt->lock);
return div_u64(load, rate);
return div_u64(load, wdt->rate);
}
static int
......@@ -228,11 +239,25 @@ sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
if (IS_ERR(wdt->base))
return PTR_ERR(wdt->base);
wdt->clk = devm_clk_get(&adev->dev, NULL);
if (IS_ERR(wdt->clk)) {
dev_warn(&adev->dev, "Clock not found\n");
ret = PTR_ERR(wdt->clk);
goto err;
if (adev->dev.of_node) {
wdt->clk = devm_clk_get(&adev->dev, NULL);
if (IS_ERR(wdt->clk)) {
dev_err(&adev->dev, "Clock not found\n");
return PTR_ERR(wdt->clk);
}
wdt->rate = clk_get_rate(wdt->clk);
} else if (has_acpi_companion(&adev->dev)) {
/*
* When Driver probe with ACPI device, clock devices
* are not available, so watchdog rate get from
* clock-frequency property given in _DSD object.
*/
device_property_read_u64(&adev->dev, "clock-frequency",
&wdt->rate);
if (!wdt->rate) {
dev_err(&adev->dev, "no clock-frequency property\n");
return -ENODEV;
}
}
wdt->adev = adev;
......@@ -244,7 +269,23 @@ sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
watchdog_set_nowayout(&wdt->wdd, nowayout);
watchdog_set_drvdata(&wdt->wdd, wdt);
watchdog_set_restart_priority(&wdt->wdd, 128);
wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
/*
* If 'timeout-sec' devicetree property is specified, use that.
* Otherwise, use DEFAULT_TIMEOUT
*/
wdt->wdd.timeout = DEFAULT_TIMEOUT;
watchdog_init_timeout(&wdt->wdd, 0, &adev->dev);
wdt_setload(&wdt->wdd, wdt->wdd.timeout);
/*
* If HW is already running, enable/reset the wdt and set the running
* bit to tell the wdt subsystem
*/
if (wdt_is_running(&wdt->wdd)) {
wdt_enable(&wdt->wdd);
set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
}
ret = watchdog_register_device(&wdt->wdd);
if (ret) {
......
......@@ -279,10 +279,8 @@ static int sprd_wdt_probe(struct platform_device *pdev)
wdt_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
wdt->base = devm_ioremap_resource(&pdev->dev, wdt_res);
if (IS_ERR(wdt->base)) {
dev_err(&pdev->dev, "failed to map memory resource\n");
if (IS_ERR(wdt->base))
return PTR_ERR(wdt->base);
}
wdt->enable = devm_clk_get(&pdev->dev, "enable");
if (IS_ERR(wdt->enable)) {
......
......@@ -11,12 +11,13 @@
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/watchdog.h>
......@@ -54,11 +55,15 @@
#define TIMEOUT_US 100000
#define SLEEP_US 1000
#define HAS_PCLK true
struct stm32_iwdg {
struct watchdog_device wdd;
void __iomem *regs;
struct clk *clk;
struct clk *clk_lsi;
struct clk *clk_pclk;
unsigned int rate;
bool has_pclk;
};
static inline u32 reg_read(void __iomem *base, u32 reg)
......@@ -133,6 +138,44 @@ static int stm32_iwdg_set_timeout(struct watchdog_device *wdd,
return 0;
}
static int stm32_iwdg_clk_init(struct platform_device *pdev,
struct stm32_iwdg *wdt)
{
u32 ret;
wdt->clk_lsi = devm_clk_get(&pdev->dev, "lsi");
if (IS_ERR(wdt->clk_lsi)) {
dev_err(&pdev->dev, "Unable to get lsi clock\n");
return PTR_ERR(wdt->clk_lsi);
}
/* optional peripheral clock */
if (wdt->has_pclk) {
wdt->clk_pclk = devm_clk_get(&pdev->dev, "pclk");
if (IS_ERR(wdt->clk_pclk)) {
dev_err(&pdev->dev, "Unable to get pclk clock\n");
return PTR_ERR(wdt->clk_pclk);
}
ret = clk_prepare_enable(wdt->clk_pclk);
if (ret) {
dev_err(&pdev->dev, "Unable to prepare pclk clock\n");
return ret;
}
}
ret = clk_prepare_enable(wdt->clk_lsi);
if (ret) {
dev_err(&pdev->dev, "Unable to prepare lsi clock\n");
clk_disable_unprepare(wdt->clk_pclk);
return ret;
}
wdt->rate = clk_get_rate(wdt->clk_lsi);
return 0;
}
static const struct watchdog_info stm32_iwdg_info = {
.options = WDIOF_SETTIMEOUT |
WDIOF_MAGICCLOSE |
......@@ -147,49 +190,42 @@ static const struct watchdog_ops stm32_iwdg_ops = {
.set_timeout = stm32_iwdg_set_timeout,
};
static const struct of_device_id stm32_iwdg_of_match[] = {
{ .compatible = "st,stm32-iwdg", .data = (void *)!HAS_PCLK },
{ .compatible = "st,stm32mp1-iwdg", .data = (void *)HAS_PCLK },
{ /* end node */ }
};
MODULE_DEVICE_TABLE(of, stm32_iwdg_of_match);
static int stm32_iwdg_probe(struct platform_device *pdev)
{
struct watchdog_device *wdd;
const struct of_device_id *match;
struct stm32_iwdg *wdt;
struct resource *res;
void __iomem *regs;
struct clk *clk;
int ret;
match = of_match_device(stm32_iwdg_of_match, &pdev->dev);
if (!match)
return -ENODEV;
wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
if (!wdt)
return -ENOMEM;
wdt->has_pclk = match->data;
/* This is the timer base. */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(regs)) {
wdt->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(wdt->regs)) {
dev_err(&pdev->dev, "Could not get resource\n");
return PTR_ERR(regs);
return PTR_ERR(wdt->regs);
}
clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(clk)) {
dev_err(&pdev->dev, "Unable to get clock\n");
return PTR_ERR(clk);
}
ret = clk_prepare_enable(clk);
if (ret) {
dev_err(&pdev->dev, "Unable to prepare clock %p\n", clk);
ret = stm32_iwdg_clk_init(pdev, wdt);
if (ret)
return ret;
}
/*
* Allocate our watchdog driver data, which has the
* struct watchdog_device nested within it.
*/
wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
if (!wdt) {
ret = -ENOMEM;
goto err;
}
/* Initialize struct stm32_iwdg. */
wdt->regs = regs;
wdt->clk = clk;
wdt->rate = clk_get_rate(clk);
/* Initialize struct watchdog_device. */
wdd = &wdt->wdd;
......@@ -217,7 +253,8 @@ static int stm32_iwdg_probe(struct platform_device *pdev)
return 0;
err:
clk_disable_unprepare(clk);
clk_disable_unprepare(wdt->clk_lsi);
clk_disable_unprepare(wdt->clk_pclk);
return ret;
}
......@@ -227,23 +264,18 @@ static int stm32_iwdg_remove(struct platform_device *pdev)
struct stm32_iwdg *wdt = platform_get_drvdata(pdev);
watchdog_unregister_device(&wdt->wdd);
clk_disable_unprepare(wdt->clk);
clk_disable_unprepare(wdt->clk_lsi);
clk_disable_unprepare(wdt->clk_pclk);
return 0;
}
static const struct of_device_id stm32_iwdg_of_match[] = {
{ .compatible = "st,stm32-iwdg" },
{ /* end node */ }
};
MODULE_DEVICE_TABLE(of, stm32_iwdg_of_match);
static struct platform_driver stm32_iwdg_driver = {
.probe = stm32_iwdg_probe,
.remove = stm32_iwdg_remove,
.driver = {
.name = "iwdg",
.of_match_table = stm32_iwdg_of_match,
.of_match_table = of_match_ptr(stm32_iwdg_of_match),
},
};
module_platform_driver(stm32_iwdg_driver);
......
// SPDX-License-Identifier: GPL-2.0
/*
* Watchdog driver for the RTC based watchdog in STMP3xxx and i.MX23/28
*
* Author: Wolfram Sang <kernel@pengutronix.de>
*
* Copyright (C) 2011-12 Wolfram Sang, Pengutronix
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
......
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