• Peter Zijlstra's avatar
    x86/atomic: Fix smp_mb__{before,after}_atomic() · 2175aa3f
    Peter Zijlstra authored
    [ Upstream commit 69d927bb ]
    
    Recent probing at the Linux Kernel Memory Model uncovered a
    'surprise'. Strongly ordered architectures where the atomic RmW
    primitive implies full memory ordering and
    smp_mb__{before,after}_atomic() are a simple barrier() (such as x86)
    fail for:
    
    	*x = 1;
    	atomic_inc(u);
    	smp_mb__after_atomic();
    	r0 = *y;
    
    Because, while the atomic_inc() implies memory order, it
    (surprisingly) does not provide a compiler barrier. This then allows
    the compiler to re-order like so:
    
    	atomic_inc(u);
    	*x = 1;
    	smp_mb__after_atomic();
    	r0 = *y;
    
    Which the CPU is then allowed to re-order (under TSO rules) like:
    
    	atomic_inc(u);
    	r0 = *y;
    	*x = 1;
    
    And this very much was not intended. Therefore strengthen the atomic
    RmW ops to include a compiler barrier.
    
    NOTE: atomic_{or,and,xor} and the bitops already had the compiler
    barrier.
    Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
    Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
    2175aa3f
atomic_t.txt 6.16 KB