• Daniel Mack's avatar
    clk: Add driver for MAX9485 · 33f51046
    Daniel Mack authored
    This patch adds a driver for MAX9485, a programmable audio clock generator.
    
    The device requires a 27.000 MHz clock input. It can provide a gated
    buffered output of its input clock and two gated outputs of a PLL that can
    generate one out of 16 discrete frequencies. There is only one PLL however,
    so the two gated outputs will always have the same frequency but they can
    be switched individually.
    
    The driver for this device exposes 4 clocks in total:
    
    - MAX9485_MCLKOUT:      A gated, buffered output of the input clock
    - MAX9485_CLKOUT:       A PLL that can be configured to 16 different
    			discrete frequencies
    - MAX9485_CLKOUT[1,2]:  Two gated outputs for MAX9485_CLKOUT
    
    Some PLL output frequencies can be achieved with different register
    settings. The driver will select the one with lowest jitter in such cases.
    Signed-off-by: 's avatarDaniel Mack <daniel@zonque.org>
    [sboyd@kernel.org: Use local variable for val in max9485_clkout_recalc_rate()
    and shorten line of max9485_of_clk_get()]
    Signed-off-by: 's avatarStephen Boyd <sboyd@kernel.org>
    33f51046
clk-max9485.c 9.89 KB