Commit 0f4630f3 authored by Linus Walleij's avatar Linus Walleij

gpio: generic: factor into gpio_chip struct

The separate struct bgpio_chip has been a pain to handle, both
by being confusingly similar in name to struct gpio_chip and
for being contained inside a struct so that struct gpio_chip
is contained in a struct contained in a struct, making several
steps of dereferencing necessary.

Make things simpler: include the fields directly into
<linux/gpio/driver.h>, #ifdef:ed for CONFIG_GENERIC_GPIO, and
get rid of the <linux/basic_mmio_gpio.h> altogether. Prefix
some of the member variables with bgpio_* and add proper
kerneldoc while we're at it.

Modify all users to handle the change and use a struct
gpio_chip directly. And while we're at it: replace all
container_of() dereferencing by gpiochip_get_data() and
registering the gpio_chip with gpiochip_add_data().

Cc: [email protected]
Cc: Alexander Shiyan <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Kukjin Kim <[email protected]>
Cc: Alexandre Courbot <[email protected]>
Cc: Brian Norris <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Sudeep Holla <[email protected]>
Cc: Lorenzo Pieralisi <[email protected]>
Cc: Nicolas Pitre <[email protected]>
Cc: Olof Johansson <[email protected]>
Cc: Vladimir Zapolskiy <[email protected]>
Cc: Rabin Vincent <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Acked-by: default avatarGregory Fong <[email protected]>
Acked-by: default avatarLiviu Dudau <[email protected]>
Acked-by: default avatarH Hartley Sweeten <[email protected]>
Acked-by: default avatarTony Lindgren <[email protected]>
Acked-by: default avatarKrzysztof Kozlowski <[email protected]>
Acked-by: Lee Jones's avatarLee Jones <[email protected]>
Signed-off-by: default avatarLinus Walleij <[email protected]>
parent 3208b0f0
......@@ -31,7 +31,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand-gpio.h>
#include <linux/platform_device.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/gpio/driver.h>
#include <mach/hardware.h>
#include <asm/sizes.h>
......
......@@ -28,7 +28,7 @@
#include <linux/leds.h>
#include <linux/sizes.h>
#include <linux/backlight.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/gpio/driver.h>
#include <linux/platform_device.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand-gpio.h>
......
......@@ -17,7 +17,7 @@
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/physmap.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/gpio/driver.h>
#include <linux/gpio.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
......
......@@ -11,7 +11,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/basic_mmio_gpio.h>
#include <linux/gpio/driver.h>
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
......
......@@ -29,7 +29,7 @@
#include <linux/pwm_backlight.h>
#include <linux/dm9000.h>
#include <linux/gpio_keys.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/gpio/driver.h>
#include <linux/spi/spi.h>
#include <linux/platform_data/pca953x.h>
......
......@@ -10,10 +10,9 @@
*/
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/gpio/driver.h>
#include <linux/platform_device.h>
#define MMIO_74XX_DIR_IN (0 << 8)
......@@ -21,7 +20,7 @@
#define MMIO_74XX_BIT_CNT(x) ((x) & 0xff)
struct mmio_74xx_gpio_priv {
struct bgpio_chip bgc;
struct gpio_chip gc;
unsigned flags;
};
......@@ -78,30 +77,23 @@ static const struct of_device_id mmio_74xx_gpio_ids[] = {
};
MODULE_DEVICE_TABLE(of, mmio_74xx_gpio_ids);
static inline struct mmio_74xx_gpio_priv *to_74xx_gpio(struct gpio_chip *gc)
{
struct bgpio_chip *bgc = to_bgpio_chip(gc);
return container_of(bgc, struct mmio_74xx_gpio_priv, bgc);
}
static int mmio_74xx_get_direction(struct gpio_chip *gc, unsigned offset)
{
struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc);
struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc);
return (priv->flags & MMIO_74XX_DIR_OUT) ? GPIOF_DIR_OUT : GPIOF_DIR_IN;
return !(priv->flags & MMIO_74XX_DIR_OUT);
}
static int mmio_74xx_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc);
struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc);
return (priv->flags & MMIO_74XX_DIR_OUT) ? -ENOTSUPP : 0;
}
static int mmio_74xx_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
struct mmio_74xx_gpio_priv *priv = to_74xx_gpio(gc);
struct mmio_74xx_gpio_priv *priv = gpiochip_get_data(gc);
if (priv->flags & MMIO_74XX_DIR_OUT) {
gc->set(gc, gpio, val);
......@@ -134,28 +126,29 @@ static int mmio_74xx_gpio_probe(struct platform_device *pdev)
priv->flags = (uintptr_t) of_id->data;
err = bgpio_init(&priv->bgc, &pdev->dev,
err = bgpio_init(&priv->gc, &pdev->dev,
DIV_ROUND_UP(MMIO_74XX_BIT_CNT(priv->flags), 8),
dat, NULL, NULL, NULL, NULL, 0);
if (err)
return err;
priv->bgc.gc.direction_input = mmio_74xx_dir_in;
priv->bgc.gc.direction_output = mmio_74xx_dir_out;
priv->bgc.gc.get_direction = mmio_74xx_get_direction;
priv->bgc.gc.ngpio = MMIO_74XX_BIT_CNT(priv->flags);
priv->bgc.gc.owner = THIS_MODULE;
priv->gc.direction_input = mmio_74xx_dir_in;
priv->gc.direction_output = mmio_74xx_dir_out;
priv->gc.get_direction = mmio_74xx_get_direction;
priv->gc.ngpio = MMIO_74XX_BIT_CNT(priv->flags);
priv->gc.owner = THIS_MODULE;
platform_set_drvdata(pdev, priv);
return gpiochip_add(&priv->bgc.gc);
return gpiochip_add_data(&priv->gc, priv);
}
static int mmio_74xx_gpio_remove(struct platform_device *pdev)
{
struct mmio_74xx_gpio_priv *priv = platform_get_drvdata(pdev);
return bgpio_remove(&priv->bgc);
gpiochip_remove(&priv->gc);
return 0;
}
static struct platform_driver mmio_74xx_gpio_driver = {
......
......@@ -16,7 +16,6 @@
#include <linux/of_device.h>
#include <linux/of_irq.h>
#include <linux/module.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/irqdomain.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/interrupt.h>
......@@ -35,7 +34,7 @@
struct brcmstb_gpio_bank {
struct list_head node;
int id;
struct bgpio_chip bgc;
struct gpio_chip gc;
struct brcmstb_gpio_priv *parent_priv;
u32 width;
struct irq_chip irq_chip;
......@@ -57,37 +56,30 @@ struct brcmstb_gpio_priv {
/* assumes MAX_GPIO_PER_BANK is a multiple of 2 */
#define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1))
static inline struct brcmstb_gpio_bank *
brcmstb_gpio_gc_to_bank(struct gpio_chip *gc)
{
struct bgpio_chip *bgc = to_bgpio_chip(gc);
return container_of(bgc, struct brcmstb_gpio_bank, bgc);
}
static inline struct brcmstb_gpio_priv *
brcmstb_gpio_gc_to_priv(struct gpio_chip *gc)
{
struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
return bank->parent_priv;
}
static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
unsigned int offset, bool enable)
{
struct bgpio_chip *bgc = &bank->bgc;
struct gpio_chip *gc = &bank->gc;
struct brcmstb_gpio_priv *priv = bank->parent_priv;
u32 mask = bgc->pin2mask(bgc, offset);
u32 mask = gc->pin2mask(gc, offset);
u32 imask;
unsigned long flags;
spin_lock_irqsave(&bgc->lock, flags);
imask = bgc->read_reg(priv->reg_base + GIO_MASK(bank->id));
spin_lock_irqsave(&gc->bgpio_lock, flags);
imask = gc->read_reg(priv->reg_base + GIO_MASK(bank->id));
if (enable)
imask |= mask;
else
imask &= ~mask;
bgc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask);
spin_unlock_irqrestore(&bgc->lock, flags);
gc->write_reg(priv->reg_base + GIO_MASK(bank->id), imask);
spin_unlock_irqrestore(&gc->bgpio_lock, flags);
}
/* -------------------- IRQ chip functions -------------------- */
......@@ -95,7 +87,7 @@ static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
static void brcmstb_gpio_irq_mask(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
brcmstb_gpio_set_imask(bank, d->hwirq, false);
}
......@@ -103,7 +95,7 @@ static void brcmstb_gpio_irq_mask(struct irq_data *d)
static void brcmstb_gpio_irq_unmask(struct irq_data *d)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
brcmstb_gpio_set_imask(bank, d->hwirq, true);
}
......@@ -111,7 +103,7 @@ static void brcmstb_gpio_irq_unmask(struct irq_data *d)
static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
{
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
struct brcmstb_gpio_priv *priv = bank->parent_priv;
u32 mask = BIT(d->hwirq);
u32 edge_insensitive, iedge_insensitive;
......@@ -149,23 +141,23 @@ static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
return -EINVAL;
}
spin_lock_irqsave(&bank->bgc.lock, flags);
spin_lock_irqsave(&bank->gc.bgpio_lock, flags);
iedge_config = bank->bgc.read_reg(priv->reg_base +
iedge_config = bank->gc.read_reg(priv->reg_base +
GIO_EC(bank->id)) & ~mask;
iedge_insensitive = bank->bgc.read_reg(priv->reg_base +
iedge_insensitive = bank->gc.read_reg(priv->reg_base +
GIO_EI(bank->id)) & ~mask;
ilevel = bank->bgc.read_reg(priv->reg_base +
ilevel = bank->gc.read_reg(priv->reg_base +
GIO_LEVEL(bank->id)) & ~mask;
bank->bgc.write_reg(priv->reg_base + GIO_EC(bank->id),
bank->gc.write_reg(priv->reg_base + GIO_EC(bank->id),
iedge_config | edge_config);
bank->bgc.write_reg(priv->reg_base + GIO_EI(bank->id),
bank->gc.write_reg(priv->reg_base + GIO_EI(bank->id),
iedge_insensitive | edge_insensitive);
bank->bgc.write_reg(priv->reg_base + GIO_LEVEL(bank->id),
bank->gc.write_reg(priv->reg_base + GIO_LEVEL(bank->id),
ilevel | level);
spin_unlock_irqrestore(&bank->bgc.lock, flags);
spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags);
return 0;
}
......@@ -210,29 +202,29 @@ static irqreturn_t brcmstb_gpio_wake_irq_handler(int irq, void *data)
static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank)
{
struct brcmstb_gpio_priv *priv = bank->parent_priv;
struct irq_domain *irq_domain = bank->bgc.gc.irqdomain;
struct irq_domain *irq_domain = bank->gc.irqdomain;
void __iomem *reg_base = priv->reg_base;
unsigned long status;
unsigned long flags;
spin_lock_irqsave(&bank->bgc.lock, flags);
while ((status = bank->bgc.read_reg(reg_base + GIO_STAT(bank->id)) &
bank->bgc.read_reg(reg_base + GIO_MASK(bank->id)))) {
spin_lock_irqsave(&bank->gc.bgpio_lock, flags);
while ((status = bank->gc.read_reg(reg_base + GIO_STAT(bank->id)) &
bank->gc.read_reg(reg_base + GIO_MASK(bank->id)))) {
int bit;
for_each_set_bit(bit, &status, 32) {
u32 stat = bank->bgc.read_reg(reg_base +
u32 stat = bank->gc.read_reg(reg_base +
GIO_STAT(bank->id));
if (bit >= bank->width)
dev_warn(&priv->pdev->dev,
"IRQ for invalid GPIO (bank=%d, offset=%d)\n",
bank->id, bit);
bank->bgc.write_reg(reg_base + GIO_STAT(bank->id),
bank->gc.write_reg(reg_base + GIO_STAT(bank->id),
stat | BIT(bit));
generic_handle_irq(irq_find_mapping(irq_domain, bit));
}
}
spin_unlock_irqrestore(&bank->bgc.lock, flags);
spin_unlock_irqrestore(&bank->gc.bgpio_lock, flags);
}
/* Each UPG GIO block has one IRQ for all banks */
......@@ -303,9 +295,7 @@ static int brcmstb_gpio_remove(struct platform_device *pdev)
*/
list_for_each(pos, &priv->bank_list) {
bank = list_entry(pos, struct brcmstb_gpio_bank, node);
ret = bgpio_remove(&bank->bgc);
if (ret)
dev_err(&pdev->dev, "gpiochip_remove fail in cleanup\n");
gpiochip_remove(&bank->gc);
}
if (priv->reboot_notifier.notifier_call) {
ret = unregister_reboot_notifier(&priv->reboot_notifier);
......@@ -320,7 +310,7 @@ static int brcmstb_gpio_of_xlate(struct gpio_chip *gc,
const struct of_phandle_args *gpiospec, u32 *flags)
{
struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc);
struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc);
struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
int offset;
if (gc->of_gpio_n_cells != 2) {
......@@ -398,9 +388,9 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev,
if (priv->can_wake)
bank->irq_chip.irq_set_wake = brcmstb_gpio_irq_set_wake;
gpiochip_irqchip_add(&bank->bgc.gc, &bank->irq_chip, 0,
gpiochip_irqchip_add(&bank->gc, &bank->irq_chip, 0,
handle_simple_irq, IRQ_TYPE_NONE);
gpiochip_set_chained_irqchip(&bank->bgc.gc, &bank->irq_chip,
gpiochip_set_chained_irqchip(&bank->gc, &bank->irq_chip,
priv->parent_irq, brcmstb_gpio_irq_handler);
return 0;
......@@ -451,7 +441,6 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
of_property_for_each_u32(np, "brcm,gpio-bank-widths", prop, p,
bank_width) {
struct brcmstb_gpio_bank *bank;
struct bgpio_chip *bgc;
struct gpio_chip *gc;
bank = devm_kzalloc(dev, sizeof(*bank), GFP_KERNEL);
......@@ -473,8 +462,8 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
* Regs are 4 bytes wide, have data reg, no set/clear regs,
* and direction bits have 0 = output and 1 = input
*/
bgc = &bank->bgc;
err = bgpio_init(bgc, dev, 4,
gc = &bank->gc;
err = bgpio_init(gc, dev, 4,
reg_base + GIO_DATA(bank->id),
NULL, NULL, NULL,
reg_base + GIO_IODIR(bank->id), 0);
......@@ -483,7 +472,6 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
goto fail;
}
gc = &bgc->gc;
gc->of_node = np;
gc->owner = THIS_MODULE;
gc->label = np->full_name;
......@@ -497,9 +485,9 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
* Mask all interrupts by default, since wakeup interrupts may
* be retained from S5 cold boot
*/
bank->bgc.write_reg(reg_base + GIO_MASK(bank->id), 0);
gc->write_reg(reg_base + GIO_MASK(bank->id), 0);
err = gpiochip_add(gc);
err = gpiochip_add_data(gc, bank);
if (err) {
dev_err(dev, "Could not add gpiochip for bank %d\n",
bank->id);
......
......@@ -10,24 +10,23 @@
*/
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/gpio/driver.h>
#include <linux/platform_device.h>
static int clps711x_gpio_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
void __iomem *dat, *dir;
struct bgpio_chip *bgc;
struct gpio_chip *gc;
struct resource *res;
int err, id = np ? of_alias_get_id(np, "gpio") : pdev->id;
if ((id < 0) || (id > 4))
return -ENODEV;
bgc = devm_kzalloc(&pdev->dev, sizeof(*bgc), GFP_KERNEL);
if (!bgc)
gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
if (!gc)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
......@@ -43,11 +42,11 @@ static int clps711x_gpio_probe(struct platform_device *pdev)
switch (id) {
case 3:
/* PORTD is inverted logic for direction register */
err = bgpio_init(bgc, &pdev->dev, 1, dat, NULL, NULL,
err = bgpio_init(gc, &pdev->dev, 1, dat, NULL, NULL,
NULL, dir, 0);
break;
default:
err = bgpio_init(bgc, &pdev->dev, 1, dat, NULL, NULL,
err = bgpio_init(gc, &pdev->dev, 1, dat, NULL, NULL,
dir, NULL, 0);
break;
}
......@@ -58,24 +57,25 @@ static int clps711x_gpio_probe(struct platform_device *pdev)
switch (id) {
case 4:
/* PORTE is 3 lines only */
bgc->gc.ngpio = 3;
gc->ngpio = 3;
break;
default:
break;
}
bgc->gc.base = id * 8;
bgc->gc.owner = THIS_MODULE;
platform_set_drvdata(pdev, bgc);
gc->base = id * 8;
gc->owner = THIS_MODULE;
platform_set_drvdata(pdev, gc);
return gpiochip_add(&bgc->gc);
return gpiochip_add_data(gc, NULL);
}
static int clps711x_gpio_remove(struct platform_device *pdev)
{
struct bgpio_chip *bgc = platform_get_drvdata(pdev);
struct gpio_chip *gc = platform_get_drvdata(pdev);
return bgpio_remove(bgc);
gpiochip_remove(gc);
return 0;
}
static const struct of_device_id __maybe_unused clps711x_gpio_ids[] = {
......
......@@ -7,7 +7,9 @@
*
* All enquiries to [email protected]
*/
#include <linux/basic_mmio_gpio.h>
#include <linux/gpio/driver.h>
/* FIXME: for gpio_get_value(), replace this with direct register read */
#include <linux/gpio.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/interrupt.h>
......@@ -66,7 +68,7 @@ struct dwapb_context {
#endif
struct dwapb_gpio_port {
struct bgpio_chip bgc;
struct gpio_chip gc;
bool is_registered;
struct dwapb_gpio *gpio;
#ifdef CONFIG_PM_SLEEP
......@@ -83,33 +85,26 @@ struct dwapb_gpio {
struct irq_domain *domain;
};
static inline struct dwapb_gpio_port *
to_dwapb_gpio_port(struct bgpio_chip *bgc)
{
return container_of(bgc, struct dwapb_gpio_port, bgc);
}
static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset)
{
struct bgpio_chip *bgc = &gpio->ports[0].bgc;
struct gpio_chip *gc = &gpio->ports[0].gc;
void __iomem *reg_base = gpio->regs;
return bgc->read_reg(reg_base + offset);
return gc->read_reg(reg_base + offset);
}
static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset,
u32 val)
{
struct bgpio_chip *bgc = &gpio->ports[0].bgc;
struct gpio_chip *gc = &gpio->ports[0].gc;
void __iomem *reg_base = gpio->regs;
bgc->write_reg(reg_base + offset, val);
gc->write_reg(reg_base + offset, val);
}
static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
{
struct bgpio_chip *bgc = to_bgpio_chip(gc);
struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc);
struct dwapb_gpio_port *port = gpiochip_get_data(gc);
struct dwapb_gpio *gpio = port->gpio;
return irq_find_mapping(gpio->domain, offset);
......@@ -119,7 +114,7 @@ static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs)
{
u32 v = dwapb_read(gpio, GPIO_INT_POLARITY);
if (gpio_get_value(gpio->ports[0].bgc.gc.base + offs))
if (gpio_get_value(gpio->ports[0].gc.base + offs))
v &= ~BIT(offs);
else
v |= BIT(offs);
......@@ -162,39 +157,39 @@ static void dwapb_irq_enable(struct irq_data *d)
{
struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
struct dwapb_gpio *gpio = igc->private;
struct bgpio_chip *bgc = &gpio->ports[0].bgc;
struct gpio_chip *gc = &gpio->ports[0].gc;
unsigned long flags;
u32 val;
spin_lock_irqsave(&bgc->lock, flags);
spin_lock_irqsave(&gc->bgpio_lock, flags);
val = dwapb_read(gpio, GPIO_INTEN);
val |= BIT(d->hwirq);
dwapb_write(gpio, GPIO_INTEN, val);
spin_unlock_irqrestore(&bgc->lock, flags);
spin_unlock_irqrestore(&gc->bgpio_lock, flags);
}
static void dwapb_irq_disable(struct irq_data *d)
{
struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
struct dwapb_gpio *gpio = igc->private;
struct bgpio_chip *bgc = &gpio->ports[0].bgc;
struct gpio_chip *gc = &gpio->ports[0].gc;
unsigned long flags;
u32 val;
spin_lock_irqsave(&bgc->lock, flags);
spin_lock_irqsave(&gc->bgpio_lock, flags);
val = dwapb_read(gpio, GPIO_INTEN);
val &= ~BIT(d->hwirq);
dwapb_write(gpio, GPIO_INTEN, val);
spin_unlock_irqrestore(&bgc->lock, flags);
spin_unlock_irqrestore(&gc->bgpio_lock, flags);
}
static int dwapb_irq_reqres(struct irq_data *d)
{
struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
struct dwapb_gpio *gpio = igc->private;
struct bgpio_chip *bgc = &gpio->ports[0].bgc;
struct gpio_chip *gc = &gpio->ports[0].gc;
if (gpiochip_lock_as_irq(&bgc->gc, irqd_to_hwirq(d))) {
if (gpiochip_lock_as_irq(gc, irqd_to_hwirq(d))) {
dev_err(gpio->dev, "unable to lock HW IRQ %lu for IRQ\n",
irqd_to_hwirq(d));
return -EINVAL;
......@@ -206,16 +201,16 @@ static void dwapb_irq_relres(struct irq_data *d)
{
struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
struct dwapb_gpio *gpio = igc->private;
struct bgpio_chip *bgc = &gpio->ports[0].bgc;
struct gpio_chip *gc = &gpio->ports[0].gc;
gpiochip_unlock_as_irq(&bgc->gc, irqd_to_hwirq(d));
gpiochip_unlock_as_irq(gc, irqd_to_hwirq(d));
}
static int dwapb_irq_set_type(struct irq_data *d, u32 type)
{
struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
struct dwapb_gpio *gpio = igc->private;
struct bgpio_chip *bgc = &gpio->ports[0].bgc;
struct gpio_chip *gc = &gpio->ports[0].gc;
int bit = d->hwirq;
unsigned long level, polarity, flags;
......@@ -223,7 +218,7 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
return -EINVAL;
spin_lock_irqsave(&bgc->lock, flags);
spin_lock_irqsave(&gc->bgpio_lock, flags);
level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
polarity = dwapb_read(gpio, GPIO_INT_POLARITY);
......@@ -254,7 +249,7 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level);
dwapb_write(gpio, GPIO_INT_POLARITY, polarity);
spin_unlock_irqrestore(&bgc->lock, flags);
spin_unlock_irqrestore(&gc->bgpio_lock, flags);
return 0;
}
......@@ -262,13 +257,12 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
unsigned offset, unsigned debounce)
{
struct bgpio_chip *bgc = to_bgpio_chip(gc);
struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc);
struct dwapb_gpio_port *port = gpiochip_get_data(gc);
struct dwapb_gpio *gpio = port->gpio;
unsigned long flags, val_deb;
unsigned long mask = bgc->pin2mask(bgc, offset);
unsigned long mask = gc->pin2mask(gc, offset);
spin_lock_irqsave(&bgc->lock, flags);
spin_lock_irqsave(&gc->bgpio_lock, flags);
val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
if (debounce)
......@@ -276,7 +270,7 @@ static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
else
dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb & ~mask);
spin_unlock_irqrestore(&bgc->lock, flags);
spin_unlock_irqrestore(&gc->bgpio_lock, flags);
return 0;
}
......@@ -295,7 +289,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
struct dwapb_gpio_port *port,
struct dwapb_port_property *pp)
{
struct gpio_chip *gc = &port->bgc.gc;
struct gpio_chip *gc = &port->gc;
struct device_node *node = pp->node;
struct irq_chip_generic *irq_gc = NULL;
unsigned int hwirq, ngpio = gc->ngpio;
......@@ -369,13 +363,13 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
for (hwirq = 0 ; hwirq < ngpio ; hwirq++)
irq_create_mapping(gpio->domain, hwirq);
port->bgc.gc.to_irq = dwapb_gpio_to_irq;
port->gc.to_irq = dwapb_gpio_to_irq;
}
static void dwapb_irq_teardown(struct dwapb_gpio *gpio)
{
struct dwapb_gpio_port *port = &gpio->ports[0];
struct gpio_chip *gc = &port->bgc.gc;
struct gpio_chip *gc = &port->gc;
unsigned int ngpio = gc->ngpio;
irq_hw_number_t hwirq;
......@@ -412,7 +406,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
dirout = gpio->regs + GPIO_SWPORTA_DDR +
(pp->idx * GPIO_SWPORT_DDR_SIZE);
err = bgpio_init(&port->bgc, gpio->dev, 4, dat, set, NULL, dirout,
err = bgpio_init(&port->gc, gpio->dev, 4, dat, set, NULL, dirout,
NULL, false);
if (err) {
dev_err(gpio->dev, "failed to init gpio chip for %s\n",
......@@ -421,19 +415,19 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
}
#ifdef CONFIG_OF_GPIO
port->bgc.gc.of_node = pp->node;
port->gc.of_node = pp->node;
#endif
port->bgc.gc.ngpio = pp->ngpio;
port->bgc.gc.base = pp->gpio_base;
port->gc.ngpio = pp->ngpio;
port->gc.base = pp->gpio_base;
/* Only port A support debounce */
if (pp->idx == 0)
port->bgc.gc.set_debounce = dwapb_gpio_set_debounce;
port->gc.set_debounce = dwapb_gpio_set_debounce;
if (pp->irq)
dwapb_configure_irqs(gpio, port, pp);
err = gpiochip_add(&port->bgc.gc);
err = gpiochip_add_data(&port->gc, port);
if (err)
dev_err(gpio->dev, "failed to register gpiochip for %s\n",
pp->name);
......@@ -449,7 +443,7 @@ static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
for (m = 0; m < gpio->nr_ports; ++m)
if (gpio->ports[m].is_registered)
gpiochip_remove(&gpio->ports[m].bgc.gc);
gpiochip_remove(&gpio->ports[m].gc);
}
static struct dwapb_platform_data *
......@@ -591,11 +585,11 @@ static int dwapb_gpio_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
struct bgpio_chip *bgc = &gpio->ports[0].bgc;
struct gpio_chip *gc = &gpio->ports[0].gc;
unsigned long flags;
int i;
spin_lock_irqsave(&bgc->lock, flags);
spin_lock_irqsave(&gc->bgpio_lock, flags);
for (i = 0; i < gpio->nr_ports; i++) {
unsigned int offset;
unsigned int idx = gpio->ports[i].idx;
......@@ -624,7 +618,7 @@ static int dwapb_gpio_suspend(struct device *dev)
dwapb_write(gpio, GPIO_INTMASK, 0xffffffff);
}
}
spin_unlock_irqrestore(&bgc->lock, flags);
spin_unlock_irqrestore(&gc->bgpio_lock, flags);