Commit 4b935870 by Dennis Busch

updated source syntax to KickAssembler4.7 format and fixed bugs that were…

updated source syntax to KickAssembler4.7 format and fixed bugs that were introduced by that process
parent 92b98dc8
......@@ -28,7 +28,7 @@
//
// DUE TO SELF-MODIFYING CODE, SOME OF THE ROUTINES CAN'T BE RAN IN ROM.
.var cavelib_version = "n0.1p"
.var cavelib_version = "n0.2p"
// as stuff might still get changed around,
// user code should always assert against a specific version
.macro assert_cavelib_version(v)
......@@ -110,9 +110,9 @@
lda CIA1_IRQ_CTRL // read once...
lda CIA2_IRQ_CTRL // ...to cancel all queued/unprocessed CIA-IRQs
:fetch_pointer NMI_PTR ; #NMI_HANDLER // replace kernal NMI handler
:fetch_pointer IRQ_BRK_PTR ; #IRQ_BRK_HANDLER // replace kernal IRQ/BRK handler
:fetch_pointer IRQ_VECTOR ; #AFTER_IRQ_HANDLER // replace kernal default IRQ handler
:fetch_pointer NMI_PTR : #NMI_HANDLER // replace kernal NMI handler
:fetch_pointer IRQ_BRK_PTR : #IRQ_BRK_HANDLER // replace kernal IRQ/BRK handler
:fetch_pointer IRQ_VECTOR : #AFTER_IRQ_HANDLER // replace kernal default IRQ handler
:switch_out_ROM_BASIC_KERNAL
:save_BASIC_zeropage
......@@ -137,9 +137,9 @@
:switch_in_ROM_BASIC_KERNAL
// restore IRQ handlers
:fetch_pointer NMI_PTR ; $FE43
:fetch_pointer IRQ_BRK_PTR ; $FF48
:fetch_pointer IRQ_VECTOR ; $EA31
:fetch_pointer NMI_PTR : $FE43
:fetch_pointer IRQ_BRK_PTR : $FF48
:fetch_pointer IRQ_VECTOR : $EA31
:enable_runstop_check
......@@ -149,4 +149,4 @@
reset:
:blank_screen
jmp ($FFFC) // soft reset vector
}
\ No newline at end of file
}
......@@ -41,7 +41,7 @@
// if $0011 is given, the values read from $0011 and $0012
// are stored into pname and pname+1
//
.pseudocommand fetch_pointer pname ; source_address
.pseudocommand fetch_pointer pname : source_address
{
lda low_pointer(source_address)
sta pname.getValue()
......@@ -49,7 +49,7 @@
sta pname.getValue()+1
}
.pseudocommand fetch_value tname ; pointer_to_source
.pseudocommand fetch_value tname : pointer_to_source
{
ldy #$00
lda (pointer_to_source.getValue()),y
......@@ -65,47 +65,47 @@
// target = any standard 6510 assembly address expression
// valid for both lda and sta, e.g. $0801 or $0002,x
// (no immediate addresses allowed because of sta in use)
.pseudocommand set_bit0 target { lda target ora #$01 sta target }
.pseudocommand set_bit1 target { lda target ora #$02 sta target }
.pseudocommand set_bit2 target { lda target ora #$04 sta target }
.pseudocommand set_bit3 target { lda target ora #$08 sta target }
.pseudocommand set_bit4 target { lda target ora #$10 sta target }
.pseudocommand set_bit5 target { lda target ora #$20 sta target }
.pseudocommand set_bit6 target { lda target ora #$40 sta target }
.pseudocommand set_bit7 target { lda target ora #$80 sta target }
.pseudocommand set_bit0 target { lda target; ora #$01; sta target; }
.pseudocommand set_bit1 target { lda target; ora #$02; sta target; }
.pseudocommand set_bit2 target { lda target; ora #$04; sta target; }
.pseudocommand set_bit3 target { lda target; ora #$08; sta target; }
.pseudocommand set_bit4 target { lda target; ora #$10; sta target; }
.pseudocommand set_bit5 target { lda target; ora #$20; sta target; }
.pseudocommand set_bit6 target { lda target; ora #$40; sta target; }
.pseudocommand set_bit7 target { lda target; ora #$80; sta target; }
.pseudocommand clear_bit0 target { lda target and #$FE sta target }
.pseudocommand clear_bit1 target { lda target and #$FD sta target }
.pseudocommand clear_bit2 target { lda target and #$FB sta target }
.pseudocommand clear_bit3 target { lda target and #$F7 sta target }
.pseudocommand clear_bit4 target { lda target and #$EF sta target }
.pseudocommand clear_bit5 target { lda target and #$DF sta target }
.pseudocommand clear_bit6 target { lda target and #$BF sta target }
.pseudocommand clear_bit7 target { lda target and #$7F sta target }
.pseudocommand clear_bit0 target { lda target; and #$FE; sta target; }
.pseudocommand clear_bit1 target { lda target; and #$FD; sta target; }
.pseudocommand clear_bit2 target { lda target; and #$FB; sta target; }
.pseudocommand clear_bit3 target { lda target; and #$F7; sta target; }
.pseudocommand clear_bit4 target { lda target; and #$EF; sta target; }
.pseudocommand clear_bit5 target { lda target; and #$DF; sta target; }
.pseudocommand clear_bit6 target { lda target; and #$BF; sta target; }
.pseudocommand clear_bit7 target { lda target; and #$7F; sta target; }
.pseudocommand flip_bit0 target { lda target eor #$01 sta target }
.pseudocommand flip_bit1 target { lda target eor #$02 sta target }
.pseudocommand flip_bit2 target { lda target eor #$04 sta target }
.pseudocommand flip_bit3 target { lda target eor #$08 sta target }
.pseudocommand flip_bit4 target { lda target eor #$10 sta target }
.pseudocommand flip_bit5 target { lda target eor #$20 sta target }
.pseudocommand flip_bit6 target { lda target eor #$40 sta target }
.pseudocommand flip_bit7 target { lda target eor #$80 sta target }
.pseudocommand flip_bit0 target { lda target; eor #$01; sta target; }
.pseudocommand flip_bit1 target { lda target; eor #$02; sta target; }
.pseudocommand flip_bit2 target { lda target; eor #$04; sta target; }
.pseudocommand flip_bit3 target { lda target; eor #$08; sta target; }
.pseudocommand flip_bit4 target { lda target; eor #$10; sta target; }
.pseudocommand flip_bit5 target { lda target; eor #$20; sta target; }
.pseudocommand flip_bit6 target { lda target; eor #$40; sta target; }
.pseudocommand flip_bit7 target { lda target; eor #$80; sta target; }
// target = any address expression EX-cluding immediate ones
// pattern = any standard 6510 assembly address expression, including
// immediate ones like #$10 or #%11010111
.pseudocommand set_bits target;pattern { lda pattern sta target }
.pseudocommand or_bits target;pattern { lda target ora pattern sta target }
.pseudocommand and_bits target;pattern { lda target and pattern sta target }
.pseudocommand eor_bits target;pattern { lda target eor pattern sta target }
.pseudocommand set_bits target:pattern { lda pattern; sta target; }
.pseudocommand or_bits target:pattern { lda target; ora pattern; sta target; }
.pseudocommand and_bits target:pattern { lda target; and pattern; sta target; }
.pseudocommand eor_bits target:pattern { lda target; eor pattern; sta target; }
// set some address using using a specific register for the pattern
// (keep in mind that not all addressing modes for target and pattern
// will work with all registers (e.g. indirect addressing works for A only))
.pseudocommand setA target;pattern { lda pattern sta target }
.pseudocommand setX target;pattern { ldx pattern stx target }
.pseudocommand setY target;pattern { ldy pattern sty target }
.pseudocommand setA target:pattern { lda pattern; sta target; }
.pseudocommand setX target:pattern { ldx pattern; stx target; }
.pseudocommand setY target:pattern { ldy pattern; sty target; }
// -----------
// bit testers
......@@ -115,11 +115,11 @@
// and 0 if the bit did match
// so BNE will branch if the bit was 1
// and BEQ will branch if the bit was 0
.pseudocommand test_bit0 target { lda #$01 bit target }
.pseudocommand test_bit1 target { lda #$02 bit target }
.pseudocommand test_bit2 target { lda #$04 bit target }
.pseudocommand test_bit3 target { lda #$08 bit target }
.pseudocommand test_bit4 target { lda #$10 bit target }
.pseudocommand test_bit5 target { lda #$20 bit target }
.pseudocommand test_bit6 target { lda #$40 bit target }
.pseudocommand test_bit7 target { lda #$80 bit target }
.pseudocommand test_bit0 target { lda #$01; bit target; }
.pseudocommand test_bit1 target { lda #$02; bit target; }
.pseudocommand test_bit2 target { lda #$04; bit target; }
.pseudocommand test_bit3 target { lda #$08; bit target; }
.pseudocommand test_bit4 target { lda #$10; bit target; }
.pseudocommand test_bit5 target { lda #$20; bit target; }
.pseudocommand test_bit6 target { lda #$40; bit target; }
.pseudocommand test_bit7 target { lda #$80; bit target; }
......@@ -28,7 +28,7 @@
.print " any file error will break to BASIC after cleanup "
php
sta $03fc stx $03fd sty $03fe
sta $03fc; stx $03fd; sty $03fe
pla
sta $03ff
rts
......@@ -165,14 +165,14 @@
// no matter if it is supposed to load to a specified address
// or to the address in the first two bytes of the file
//
.pseudocommand load_sync cstring_fname ; device ; address
.pseudocommand load_sync cstring_fname : device : address
{
// make sure the subroutine was defined first
.if ( subroutine_load_sync == $0000 )
.error ":load_sync used without :place_subroutine_load_sync"
// prepare self-modifying code variable values
:cstring_length cstring_fname ; sm_ls_sr_fnl // clobbers a NOP
:cstring_length cstring_fname : sm_ls_sr_fnl // clobbers a NOP
lda #NOP
sta sm_ls_sr_fnl+1 // put NOP back in
......@@ -216,7 +216,7 @@
// prepares the registers for SETNAM and calls it
// fname_start = the address where the filename string starts
// fname_end = the address right behind the filename string
.pseudocommand kernal_setnam fname_start ; fname_end
.pseudocommand kernal_setnam fname_start : fname_end
{
lda CmdArgument(AT_IMMEDIATE, fname_end.getValue()-fname_start.getValue())
ldx get_low(fname_start)
......@@ -232,7 +232,7 @@
// is a "load" 0 means load to address in X/Y
// while !0 would mean load to address stored inside bytes 0..1
// of the file itself
.pseudocommand kernal_setlfs file_num ; device ; secondary_address
.pseudocommand kernal_setlfs file_num : device : secondary_address
{
lda file_num
ldx device
......@@ -337,10 +337,10 @@
// (use READST before reading bytes with CHRIN after this to check for errors)
//
// will brk on error
.pseudocommand load_open fname_start ; fname_end ; file_num ; device ; secondary_address
.pseudocommand load_open fname_start : fname_end : file_num : device : secondary_address
{
:kernal_setnam fname_start ; fname_end
:kernal_setlfs file_num ; device ; secondary_address
:kernal_setnam fname_start : fname_end
:kernal_setlfs file_num : device : secondary_address
:kernal_open
bcc open_ok
......@@ -386,7 +386,7 @@
// will brk on error
//
// register A will still contain the read byte
.pseudocommand fetch_byte branch_eof_or_error ; omit_y_set
.pseudocommand fetch_byte branch_eof_or_error : omit_y_set
{
:read_byte branch_eof_or_error
.if (omit_y_set.getValue() != 1) ldy #$00
......
......@@ -3,19 +3,19 @@
// -----------------------------
// save all registers on stack
.pseudocommand push_registers { pha txa pha tya pha }
.pseudocommand push_registers { pha; txa; pha; tya; pha; }
// save CPU status on stack
.pseudocommand push_status { php }
.pseudocommand push_status { php; }
// restore all registers from stack
.pseudocommand pull_registers { pla tay pla tax pla }
.pseudocommand pull_registers { pla; tay; pla; tax; pla; }
// restore CPU status from stack
.pseudocommand pull_status { plp }
.pseudocommand pull_status { plp; }
// calls a subroutine without saving/restoring CPU status or registers
.pseudocommand call_dirty address { jsr address }
.pseudocommand call_dirty address { jsr address; }
// calls a subroutine at address and saves/restores CPU status and registers
// to/from stack
......@@ -57,4 +57,4 @@
.macro break()
{
.eval brk_file.writeln("break " + toHexString(*))
}
\ No newline at end of file
}
......@@ -8,13 +8,13 @@
// bank must be 0 to 3
// screen must be 0 to 15
//
.pseudocommand clear_text_screen bank ; screen ; char ; color
.pseudocommand clear_text_screen bank : screen : char : color
{
:range_test(bank, 0, 3)
:range_test(screen, 0, 15)
:memset #VIC2_SCREEN(bank.getValue(), screen.getValue()) ; #$03e8 ; char
:memset #VIC2_COLOR_RAM ; #$03e8 ; color
:memset #VIC2_SCREEN(bank.getValue(), screen.getValue()) : #$03e8 : char
:memset #VIC2_COLOR_RAM : #$03e8 : color
}
// Copy the character rom data to an arbitrary location.
......@@ -32,7 +32,7 @@
.error ":copy_char_rom used without :place_subroutine_copy_char_rom"
// prepare call
:fetch_pointer cl_w0 ; target
:fetch_pointer cl_w0 : target
jsr subroutine_copy_char_rom
}
......@@ -52,7 +52,7 @@
.var target = cl_w0
:toggle_IO
:memcpy cl_w0 ; #CHAR_ROM ; #CHAR_ROM_SIZE
:memcpy cl_w0 : #CHAR_ROM : #CHAR_ROM_SIZE
:toggle_IO
}
}
......@@ -85,18 +85,18 @@
//
// Clobbers: A, X, Y, cl_w0 to cl_w3, cl_b0 to cl_b4
//
.pseudocommand textout1x2 column ; row ; color ; string ; target_screen
.pseudocommand textout1x2 column : row : color : string : target_screen
{
// make sure the subroutine was defined first
.if ( subroutine_textout1x2 == $0000 )
.error ":textout1x2 used without :place_subroutine_textout1x2"
// prepare call
:fetch_pointer cl_w3 ; string
:fetch_pointer cl_w1 ; target_screen
:set_bits cl_b0 ; column
:set_bits cl_b1 ; row
:set_bits cl_b2 ; color
:fetch_pointer cl_w3 : string
:fetch_pointer cl_w1 : target_screen
:set_bits cl_b0 : column
:set_bits cl_b1 : row
:set_bits cl_b2 : color
jsr subroutine_textout1x2
}
......@@ -136,14 +136,14 @@
beq row_0
loop:
:add_words offset ; #$28 ; offset // Add another 40 to the offset
:add_words offset : #$28 : offset // Add another 40 to the offset
dex // Decrement x and loop if not zero
bne loop //
row_0:
:add_word_byte offset ; column ; offset // Add column to offset
:add_words target_ram ; offset ; target_ram // Add offset to starting screen address
:add_words #VIC2_COLOR_RAM ; offset ; target_color_ram // Add offset to starting color address
:add_word_byte offset : column : offset // Add column to offset
:add_words target_ram : offset : target_ram // Add offset to starting screen address
:add_words #VIC2_COLOR_RAM : offset : target_color_ram // Add offset to starting color address
// --------------------------------------------------------------------------------
next_char:
......@@ -175,8 +175,8 @@
lda color //
sta (target_color_ram), Y // Write color
:add_words target_ram ; #$28 ; target_ram // Offsets go up by 40 to hit bottom half
:add_words target_color_ram ; #$28 ; target_color_ram //
:add_words target_ram : #$28 : target_ram // Offsets go up by 40 to hit bottom half
:add_words target_color_ram : #$28 : target_color_ram //
lda current_glyph // Add 64 to address (to get lower half)
clc //
......@@ -186,8 +186,8 @@
sta (target_color_ram), Y // Write color
inc current_char // Address offset++
:sub_words target_ram ; #$27 ; target_ram // Character offset -= 39
:sub_words target_color_ram ; #$27 ; target_color_ram // Color mem offset -= 39
:sub_words target_ram : #$27 : target_ram // Character offset -= 39
:sub_words target_color_ram : #$27 : target_color_ram // Color mem offset -= 39
jmp next_char // Repeat until delimiter found
end_of_string:
......@@ -213,16 +213,16 @@
//
// Clobbers: A, X, Y, cl_w0 to cl_w3, cl_b0 to cl_b3
//
.pseudocommand textout1x2_to_sprites string ; sprite_address ; charset_address
.pseudocommand textout1x2_to_sprites string : sprite_address : charset_address
{
// make sure the subroutine was defined first
.if ( subroutine_textout1x2_to_sprites == $0000 )
.error ":textout1x2_to_sprites used without :place_subroutine_textout1x2_to_sprites"
// prepare call
:fetch_pointer cl_w0 ; string
:fetch_pointer cl_w1 ; sprite_address
:fetch_pointer cl_w2 ; charset_address
:fetch_pointer cl_w0 : string
:fetch_pointer cl_w1 : sprite_address
:fetch_pointer cl_w2 : charset_address
jsr subroutine_textout1x2_to_sprites
}
......@@ -284,7 +284,7 @@
sta source_byte
// (low byte, high byte) was transformed to glyph number * 8 now
:add_words charset_address ; source_byte ; source_byte
:add_words charset_address : source_byte : source_byte
// write 8 bytes from upperhalf into sprite layout
ldy #$00
......@@ -307,7 +307,7 @@
bne next_byte_upper
// get source_byte offset for lower half ( 64 * 8 from current address)
:add_words source_byte; #$0200 ; source_byte
:add_words source_byte: #$0200 : source_byte
// write 8 bytes from lowerhalf into sprite layout
ldy #$00
......@@ -350,13 +350,13 @@
dec track_mod
bne not_next
// skip 62 to get to next sprite
:add_words sprite_address ; #$003e ; sprite_address
:add_words sprite_address : #$003e : sprite_address
lda #$03
sta track_mod
jmp done
not_next:
// first or second in each group of three glyphs
:add_words sprite_address ; #$0001 ; sprite_address
:add_words sprite_address : #$0001 : sprite_address
done:
inc current_char
......@@ -365,4 +365,4 @@
rts
}
}
\ No newline at end of file
......@@ -14,7 +14,7 @@
.pseudocommand set_irq_vector handler_address
{
sei
:set_pointer IRQ_VECTOR ; handler_address
:fetch_pointer IRQ_VECTOR : handler_address
cli
}
......@@ -25,7 +25,7 @@
// by rasterline comparison
// handler_address = start of code which handles the interrupt
// first_line = raster line for the first time to trigger the interrupt
.pseudocommand init_irq_by_raster_only handler_address ; first_line
.pseudocommand init_irq_by_raster_only handler_address : first_line
{
sei // set interrupt disable
......@@ -40,7 +40,7 @@
:set_raster_compare first_line
// wire up first interrupt handler
:fetch_pointer IRQ_VECTOR ; handler_address
:fetch_pointer IRQ_VECTOR : handler_address
cli // clear interrupt disable
}
......@@ -48,10 +48,10 @@
// sets handler address and raster line at which to trigger
// the next interrupt
// ( interrupts by rasterline must have been enabled for this to work )
.pseudocommand chain_irq_by_raster handler_address ; line
.pseudocommand chain_irq_by_raster handler_address : line
{
:set_raster_compare line
:fetch_pointer IRQ_VECTOR ; handler_address
:fetch_pointer IRQ_VECTOR : handler_address
}
......@@ -121,4 +121,4 @@
// but it still looks good in code for clarity ;)
// this on the other hand is mandatory to use at end of irq routines
.pseudocommand end_irq_handler { jmp AFTER_IRQ_HANDLER }
\ No newline at end of file
.pseudocommand end_irq_handler { jmp AFTER_IRQ_HANDLER; }
......@@ -13,7 +13,7 @@
//
// Clobbers: A
//
.pseudocommand add_words one ; two ; target
.pseudocommand add_words one : two : target
{
clc // clear carry
lda one // Add low bytes
......@@ -30,7 +30,7 @@
//
// Clobbers: A
//
.pseudocommand add_word_byte w ; b ; target
.pseudocommand add_word_byte w : b : target
{
clc // clear carry
lda w // Add low bytes
......@@ -47,7 +47,7 @@
//
// Clobbers: A
//
.pseudocommand sub_words one ; two ; target
.pseudocommand sub_words one : two : target
{
sec // set carry (sbc operation is inverse)
lda one // subtract low bytes
......@@ -63,7 +63,7 @@
//
// Clobbers: A
//
.pseudocommand sub_word_byte w ; b ; target
.pseudocommand sub_word_byte w : b : target
{
sec // set carry (sbc operation is inverse)
lda w // subtract low bytes
......
......@@ -179,8 +179,8 @@
beq done
go_again:
:fetch_pointer sm_mc_p1 ; s // source and
:fetch_pointer sm_mc_p0 ; t // target updated in each iteration
:fetch_pointer sm_mc_p1 : s // source and
:fetch_pointer sm_mc_p0 : t // target updated in each iteration
ldx bc
ldy bc+1
......@@ -190,8 +190,8 @@
dec c
beq done
:add_words s ; sl ; s // skip line length in source
:add_words t ; tl ; t // skip line length in target
:add_words s : sl : s // skip line length in source
:add_words t : tl : t // skip line length in target
jmp go_again
done:
......@@ -260,13 +260,13 @@
// target = any address expression EX-cluding immediate ones
// count = number of bytes to set as a 16bit value
// value = the 8bit value to write to each address starting at target
.pseudocommand memset target ; count ; value
.pseudocommand memset target : count : value
{
// make sure the subroutine was defined first
.if ( subroutine_memset == $0000 )
.error ":memset used without :place_subroutine_memset"
:fetch_pointer sm_ms_p0 ; target
:fetch_pointer sm_ms_p0 : target
lda value
sta sm_ms_val
......@@ -280,14 +280,14 @@
// target = any address expression EX-cluding immediate ones
// count = number of bytes to modify as a 16bit value
// value = the 8bit value to XOR with each address starting at target
.pseudocommand memxor target ; count ; value
.pseudocommand memxor target : count : value
{
// make sure the subroutine was defined first
.if ( subroutine_memxor == $0000 )
.error ":memxor used without :place_subroutine_memxor"
:fetch_pointer sm_mx_p0 ; target
:fetch_pointer sm_mx_ps ; target
:fetch_pointer sm_mx_p0 : target
:fetch_pointer sm_mx_ps : target
lda value
sta sm_mx_val
......@@ -301,14 +301,14 @@
// target = any address expression EX-cluding immediate ones
// source = any address expression EX-cluding immediate ones
// count = number of bytes to copy as a 16bit value
.pseudocommand memcpy target ; source; count
.pseudocommand memcpy target : source: count
{
// make sure the subroutine was defined first
.if ( subroutine_memcpy == $0000 )
.error ":memcpy used without :place_subroutine_memcpy"
:fetch_pointer sm_mc_p0 ; target
:fetch_pointer sm_mc_p1 ; source
:fetch_pointer sm_mc_p0 : target
:fetch_pointer sm_mc_p1 : source
ldx get_low(count)
ldy get_high(count)
......@@ -325,7 +325,7 @@
// b_copy (16 bit) = the number of bytes per line to copy
// tl_length (16 bit) = the distance between two whole lines in bytes in target (the gap)
// count (8 bit) = the number of lines(or parts of lines if b_copy<sl_length) to copy
.pseudocommand gapcpy target ; source; sl_length ; b_copy ; tl_length ; count
.pseudocommand gapcpy target : source: sl_length : b_copy : tl_length : count
{
// make sure the subroutine was defined first
.if ( subroutine_gapcpy == $0000 )
......@@ -338,12 +338,12 @@
.var c = cl_b0
.var bc = cl_b1 // and cl_b2
:fetch_pointer t ; target
:fetch_pointer s ; source
:fetch_pointer sl ; sl_length
:fetch_pointer tl ; tl_length
:fetch_pointer bc ; b_copy
:set_bits c ; count
:fetch_pointer t : target
:fetch_pointer s : source
:fetch_pointer sl : sl_length
:fetch_pointer tl : tl_length
:fetch_pointer bc : b_copy
:set_bits c : count
jsr subroutine_gapcpy
}
......@@ -353,14 +353,14 @@
// count = number of bytes to swap as a 16bit value
//
// clobbers cavelib zeropage vars: cl_w0, cl_w1, cl_b0, cl_b1
.pseudocommand memswap target ; source ; count
.pseudocommand memswap target : source : count
{
// make sure the subroutine was defined first
.if ( subroutine_memswap == $0000 )
.error ":memswap used without :place_subroutine_memswap"
:fetch_pointer cl_w0 ; source
:fetch_pointer cl_w1 ; target
:fetch_pointer cl_w0 : source
:fetch_pointer cl_w1 : target
ldx get_low(count)
ldy get_high(count)
......@@ -375,7 +375,7 @@
// count = number of bytes to set as a 16bit value
// value = the 8bit value to write to each address starting at target
// no sanity checks are made whether target+count wraps around in zp, so be careful
.pseudocommand zp_memset target ; count ; value {
.pseudocommand zp_memset target : count : value {
lda target
sta sm_p0+1
lda value
......@@ -404,7 +404,7 @@
// source = any address(in zero page)
// count = number of bytes to copy as a 8bit value
// no sanity checks are made whether target+count wraps around in zp, so be careful
.pseudocommand zp_memcpy target ; source; count {
.pseudocommand zp_memcpy target : source: count {
lda target
sta sm_p0+1
lda source
......@@ -428,4 +428,4 @@
dex
bne set // if count != 0 loop
done:
}
\ No newline at end of file
}
......@@ -91,13 +91,13 @@
// cstring_address: location of a zero terminated byte sequence
// length_out: location where to store the 16bit result
// clobbers: cl_w0, cl_w1
.pseudocommand cstring_length cstring_address ; length_out
.pseudocommand cstring_length cstring_address : length_out
{
// make sure the subroutine was defined first
.if ( subroutine_cstring_length == $0000 )
.error ":cstring_length used without :place_subroutine_cstring_length"
:fetch_pointer cl_w0 ; cstring_address
:fetch_pointer cl_w0 : cstring_address
jsr subroutine_cstring_length
......
......@@ -2,14 +2,14 @@
// Variables and User Variables
// ----------------------------
.pc = $0002 "zeropage first usable address" virtual
* = $0002 "zeropage first usable address" virtual
// zero page variable definitions and library initialization
// ("fast RAM" variables)
//
.if ( include_covert_bitops_loader == 1 )
{
.pc = $0002 "zeropage covert bitops loadersytem vars" virtual
* = $0002 "zeropage covert bitops loadersytem vars" virtual
// loader needs at least 8..
.fill 8, 0
.if ( ADDITIONAL_ZEROPAGE == 1 )
......@@ -18,7 +18,7 @@
.fill 4, 0
}
}
.pc = * "zeropage cavelib vars" virtual
* = * "zeropage cavelib vars" virtual
cl_w0: .word $FFFF // general purpose 16 bit value 0
cl_w1: .word $FFFF // general purpose 16 bit value 1
cl_w2: .word $FFFF // general purpose 16 bit value 2
......@@ -40,7 +40,7 @@ cl_b4: .byte $FF // general purpose 8 bit value 4
// set all cavelib vars to the clear pattern
.pseudocommand init_cavelib_vars
{
:zp_memset #$02 ; #cavelib_vars_end-2 ; #cv_clear_pattern
:zp_memset #$02 : #cavelib_vars_end-2 : #cv_clear_pattern
}
......@@ -64,7 +64,7 @@ cl_b4: .byte $FF // general purpose 8 bit value 4
.error "zp user vars may not exceed $" + toHexString(cavelib_vars_end,2) + "-$ff range"
}
:zp_memset #cavelib_vars_end ; #cavelib_user_vars_end-cavelib_vars_end; #cv_clear_pattern
:zp_memset #cavelib_vars_end : #cavelib_user_vars_end-cavelib_vars_end: #cv_clear_pattern
}
......@@ -78,7 +78,7 @@ cl_b4: .byte $FF // general purpose 8 bit value 4
.var cavelib_user_vars_begin = $00
.pseudocommand begin_zp_user_vars
{
.pc = cavelib_vars_end "zeropage user vars" virtual
* = cavelib_vars_end "zeropage user vars" virtual
.eval cavelib_user_vars_begin = *
}
......@@ -91,17 +91,17 @@ cl_b4: .byte $FF // general purpose 8 bit value 4
// generate some memory map info for covert bitops loader system here
.if ( include_covert_bitops_loader == 1 )
{
.pc = loadbuffer "covert bitops loadersystem loadbuffer" virtual
* = loadbuffer "covert bitops loadersystem loadbuffer" virtual
.fill $100, 0
.if ( LOADFILE_PUCRUNCH > 0 )
{
.pc = depackbuffer "covert bitops loadersystem pucrunch depackbuffer" virtual
* = depackbuffer "covert bitops loadersystem pucrunch depackbuffer" virtual
.fill $1F, 0
}
.if ( LOADFILE_EXOMIZER > 0 )
{
.pc = depackbuffer "covert bitops loadersystem exomizer depackbuffer" virtual
* = depackbuffer "covert bitops loadersystem exomizer depackbuffer" virtual
.fill $9C, 0
}
}
......@@ -120,21 +120,21 @@ cl_b4: .byte $FF // general purpose 8 bit value 4
.if (pure_virtual.getValue() == 0)
{
.pc = $0810 "slow ram cavelib - vars and routines"
* = $0810 "slow ram cavelib - vars and routines"
}
else
{
.pc = $0810 "slow ram cavelib - vars and routines (virtual)" virtual
* = $0810 "slow ram cavelib - vars and routines (virtual)" virtual
}
.eval cavelib_basic_zp_saved = *
.if (pure_virtual.getValue() == 0)
{
.pc = * "slow ram cavelib - basic working area store/restore"
* = * "slow ram cavelib - basic working area store/restore"
}