Commit b958c728 authored by Alexander Shabarshin's avatar Alexander Shabarshin

C style comments

parent 9962a01a
......@@ -80,43 +80,45 @@ original copyright:
#include <libelf.h>
#include <gelf.h>
// uncomment this for an instruction trace and other debug outputs
//#define DEBUG_OUTPUT
/* uncomment this for an instruction trace and other debug outputs */
#if 0
#define DEBUG_OUTPUT
#endif
// Shaos added:
/* added by Shaos: */
#define FALSE (0)
#define TRUE (-1)
// memory mapped registers
/* memory mapped registers */
#define MTIME_ADDR 0x40000000
#define MTIMECMP_ADDR 0x40000008
#define UART_TX_ADDR 0x40002000
// emulator RAM
/* emulate RAM */
#define RAM_SIZE 0x10000
uint8_t ram[RAM_SIZE];
// special memory mapped registers
/* special memory mapped registers */
uint64_t mtime;
uint64_t mtimecmp;
// virtual start address for index 0 in the ram array
/* virtual start address for index 0 in the ram array */
uint32_t ram_start;
// used when called from the compliance tests
/* used when called from the compliance tests */
uint32_t begin_signature = 0;
uint32_t end_signature = 0;
// is set to false to exit the emulator
/* is set to false to exit the emulator */
int machine_running = TRUE;
// privilege levels
/* privilege levels */
#define PRV_U 0
#define PRV_S 1
#define PRV_H 2
#define PRV_M 3
// CPU state
/* CPU state */
uint32_t pc;
uint32_t next_pc;
uint32_t insn;
......@@ -154,7 +156,7 @@ uint32_t satp;
uint32_t scounteren;
uint32_t load_res; /* for atomic LR/SC */
// exception causes
/* exception causes */
#define CAUSE_MISALIGNED_FETCH 0x0
#define CAUSE_FAULT_FETCH 0x1
#define CAUSE_ILLEGAL_INSTRUCTION 0x2
......@@ -415,7 +417,7 @@ int csr_read(uint32_t *pval, uint32_t csr,
break;
default:
invalid_csr(pval, csr);
//return -1;
/* return -1; */
return 0;
}
*pval = val;
......@@ -514,7 +516,7 @@ int csr_write(uint32_t csr, uint32_t val)
break;
default:
return 0;
// return -1;
/* return -1; */
}
return 0;
}
......@@ -557,7 +559,7 @@ void raise_exception(uint32_t cause,
{
int deleg;
// exit for Zephyr applications
/* exit for Zephyr applications */
if (cause == CAUSE_ILLEGAL_INSTRUCTION) {
machine_running = FALSE;
return;
......@@ -711,7 +713,7 @@ int target_read_u32(uint32_t *pval, uint32_t addr)
int target_write_u8(uint32_t addr, uint8_t val)
{
if (addr == UART_TX_ADDR) {
// test for UART output, compatible with QEMU
/* test for UART output, compatible with QEMU */
printf("%c", val);
} else {
addr -= ram_start;
......@@ -832,8 +834,8 @@ static uint32_t mulhu32(uint32_t a, uint32_t b)
return ((int64_t)a * (int64_t)b) >> 32;
}
/*
// dumps all registers, useful for in-depth debugging
/* dumps all registers, useful for in-depth debugging */
#if 0
static void dump_regs()
{
printf("x0 zero: %08x\n", reg[0]);
......@@ -869,7 +871,7 @@ static void dump_regs()
printf("x30 t5: %08x\n", reg[30]);
printf("x31 t6: %08x\n", reg[31]);
}
*/
#endif
void execute_instruction()
{
......@@ -1174,7 +1176,7 @@ void execute_instruction()
if (rd != 0)
reg[rd] = val2;
if (err > 0) {
//pc = pc + 4;
/* pc = pc + 4; */
}
break;
case 2: /* csrrs */
......@@ -1207,8 +1209,10 @@ void execute_instruction()
raise_exception(CAUSE_ILLEGAL_INSTRUCTION, insn);
return;
}
// compliance test specific: if bit 0 of gp (x3) is 0, it is a syscall,
// otherwise it is the program end, with the exit code in the bits 31:1
/*
compliance test specific: if bit 0 of gp (x3) is 0, it is a syscall,
otherwise it is the program end, with the exit code in the bits 31:1
*/
if (begin_signature) {
if (reg[3] & 1) {
#ifdef DEBUG_OUTPUT
......@@ -1223,7 +1227,7 @@ void execute_instruction()
raise_exception(CAUSE_USER_ECALL + priv, 0);
}
} else {
// on real hardware, an exception is raised, the I-ECALL-01 compliance test tests this as well
/* on real hardware, an exception is raised, the I-ECALL-01 compliance test tests this as well */
raise_exception(CAUSE_USER_ECALL + priv, 0);
return;
}
......@@ -1247,7 +1251,7 @@ void execute_instruction()
}
break;
case 0x105: /* wfi */
// wait for interrupt: it is allowed to execute it as nop
/* wait for interrupt: it is allowed to execute it as nop */
break;
case 0x302: /* mret */
{
......@@ -1405,7 +1409,7 @@ void execute_instruction()
}
}
// returns realtime in nanoseconds
/* returns realtime in nanoseconds */
int64_t get_clock()
{
struct timespec ts;
......@@ -1416,26 +1420,26 @@ int64_t get_clock()
void riscv_cpu_interp_x32()
{
/* we use a single execution loop to keep a simple control flow
for emscripten */
/* we use a single execution loop to keep a simple control flow for emscripten */
while (machine_running) {
// update timer, assuming 10 MHz clock (100 ns period) for the mtime counter
/* update timer, assuming 10 MHz clock (100 ns period) for the mtime counter */
mtime = get_clock() / 100ll;
// for reproducible debug runs, you can use a fixed fixed increment per instruction
//mtime += 10;
// default value for next PC is next instruction, can be changed by branches or exceptions
/* for reproducible debug runs, you can use a fixed fixed increment per instruction */
#if 0
mtime += 10;
#endif
/* default value for next PC is next instruction, can be changed by branches or exceptions */
next_pc = pc + 4;
// test for timer interrupt
/* test for timer interrupt */
if (mtimecmp <= mtime) {
mip |= MIP_MTIP;
}
if ((mip & mie) != 0 && (mstatus & MSTATUS_MIE)) {
raise_interrupt();
} else {
// normal instruction execution
/* normal instruction execution */
insn = get_insn32(pc);
insn_counter++;
......@@ -1445,12 +1449,12 @@ void riscv_cpu_interp_x32()
execute_instruction();
}
// test for misaligned fetches
/* test for misaligned fetches */
if (next_pc & 3) {
raise_exception(CAUSE_MISALIGNED_FETCH, next_pc);
}
// update current PC
/* update current PC */
pc = next_pc;
}
......@@ -1463,10 +1467,10 @@ void riscv_cpu_interp_x32()
int main(int argc, char** argv)
{
// automatic STDOUT flushing, no fflush needed
/* automatic STDOUT flushing, no fflush needed */
setvbuf(stdout, NULL, _IONBF, 0);
// parse command line
/* parse command line */
const char* elf_file = NULL;
const char* signature_file = NULL;
for (int i = 1; i < argc; i++) {
......@@ -1482,7 +1486,7 @@ int main(int argc, char** argv)
return 1;
}
// open ELF file
/* open ELF file */
elf_version(EV_CURRENT);
int fd = open(elf_file, O_RDONLY);
if (fd == -1) {
......@@ -1491,7 +1495,7 @@ int main(int argc, char** argv)
}
Elf *elf = elf_begin(fd, ELF_C_READ, NULL);
// scan for symbol table
/* scan for symbol table */
Elf_Scn *scn = NULL;
GElf_Shdr shdr;
while ((scn = elf_nextscn(elf, scn)) != NULL) {
......@@ -1510,12 +1514,12 @@ int main(int argc, char** argv)
end_signature = sym.st_value;
}
// for compliance test
/* for compliance test */
if (strcmp(name, "_start") == 0) {
ram_start = sym.st_value;
}
// for zephyr
/* for zephyr */
if (strcmp(name, "__reset") == 0) {
ram_start = sym.st_value;
}
......@@ -1531,7 +1535,7 @@ int main(int argc, char** argv)
printf("start: 0x%08x\n", ram_start);
#endif
// scan for program
/* scan for program */
while ((scn = elf_nextscn(elf, scn)) != NULL) {
gelf_getshdr(scn, &shdr);
if (shdr.sh_type == SHT_PROGBITS) {
......@@ -1548,15 +1552,15 @@ int main(int argc, char** argv)
}
}
// close ELF file
/* close ELF file */
elf_end(elf);
close(fd);
// run program in emulator
/* run program in emulator */
pc = ram_start;
riscv_cpu_interp_x32();
// write signature
/* write signature */
if (signature_file) {
FILE* sf = fopen(signature_file, "w");
int size = end_signature - begin_signature;
......
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