Commit 5ebda7ca authored by Alexander Shabarshin's avatar Alexander Shabarshin

more stats

parent b8817e5d
/* Modified by Shaos <me@shaos.net>
20-DEC-2018 - More statistical points
22-NOV-2018 - Added saving HEX file with copy of the code in DEBUG_OUTPUT mode
21-NOV-2018 - Some statistics added in DEBUG_EXTRA mode
20-NOV-2018 - By default RV32M and RV32A extensions are disabled (STRICT_RV32I)
......@@ -1312,30 +1313,71 @@ void execute_instruction()
if (imm == 1) {
funct3 = (insn >> 12) & 7;
switch(funct3) {
case 0: /* mul */
#ifdef DEBUG_EXTRA
dprintf(">>> MUL\n");
stats[48]++;
#endif
val = (int32_t)((int32_t)val * (int32_t)val2);
break;
case 1: /* mulh */
#ifdef DEBUG_EXTRA
dprintf(">>> MULH\n");
stats[49]++;
#endif
val = (int32_t)mulh32(val, val2);
break;
case 2:/* mulhsu */
#ifdef DEBUG_EXTRA
dprintf(">>> MULHSU\n");
stats[50]++;
#endif
val = (int32_t)mulhsu32(val, val2);
break;
case 3:/* mulhu */
#ifdef DEBUG_EXTRA
dprintf(">>> MULHU\n");
stats[51]++;
#endif
val = (int32_t)mulhu32(val, val2);
break;
case 4:/* div */
#ifdef DEBUG_EXTRA
dprintf(">>> DIV\n");
stats[52]++;
#endif
val = div32(val, val2);
break;
case 5:/* divu */
#ifdef DEBUG_EXTRA
dprintf(">>> DIVU\n");
stats[53]++;
#endif
val = (int32_t)divu32(val, val2);
break;
case 6:/* rem */
#ifdef DEBUG_EXTRA
dprintf(">>> REM\n");
stats[54]++;
#endif
val = rem32(val, val2);
break;
case 7:/* remu */
#ifdef DEBUG_EXTRA
dprintf(">>> REMU\n");
stats[55]++;
#endif
val = (int32_t)remu32(val, val2);
break;
default:
raise_exception(CAUSE_ILLEGAL_INSTRUCTION, insn);
return;
......@@ -1562,7 +1604,7 @@ void execute_instruction()
{
#ifdef DEBUG_EXTRA
dprintf(">>> SRET\n");
stats[47]++;
stats[59]++;
#endif
if ((insn & 0x000fff80) || (priv < PRV_S)) {
raise_exception(CAUSE_ILLEGAL_INSTRUCTION, insn);
......@@ -1576,7 +1618,7 @@ void execute_instruction()
case 0x105: /* wfi */
#ifdef DEBUG_EXTRA
dprintf(">>> WFI\n");
stats[48]++;
stats[61]++;
#endif
/* wait for interrupt: it is allowed to execute it as nop */
break;
......@@ -1585,7 +1627,7 @@ void execute_instruction()
{
#ifdef DEBUG_EXTRA
dprintf(">>> MRET\n");
stats[49]++;
stats[60]++;
#endif
if ((insn & 0x000fff80) || (priv < PRV_M)) {
raise_exception(CAUSE_ILLEGAL_INSTRUCTION, insn);
......@@ -1600,7 +1642,7 @@ void execute_instruction()
if ((imm >> 5) == 0x09) {
#ifdef DEBUG_EXTRA
dprintf(">>> SFENCE.VMA\n");
stats[50]++;
stats[62]++;
#endif
/* sfence.vma */
if ((insn & 0x00007f80) || (priv == PRV_U)) {
......@@ -1669,6 +1711,10 @@ void execute_instruction()
switch(funct3) {
case 2: /* lr.w */
#ifdef DEBUG_EXTRA
dprintf(">>> LR.W\n");
stats[56]++;
#endif
if (rs2 != 0) {
raise_exception(CAUSE_ILLEGAL_INSTRUCTION, insn);
return;
......@@ -1682,6 +1728,10 @@ void execute_instruction()
break;
case 3: /* sc.w */
#ifdef DEBUG_EXTRA
dprintf(">>> SC.W\n");
stats[57]++;
#endif
if (load_res == addr) {
if (target_write_u32(addr, reg[rs2])) {
raise_exception(pending_exception, pending_tval);
......@@ -1703,6 +1753,10 @@ void execute_instruction()
case 0x18: /* amominu.w */
case 0x1c: /* amomaxu.w */
#ifdef DEBUG_EXTRA
dprintf(">>> AM...\n");
stats[63]++;
#endif
if (target_read_u32(&rval, addr)) {
raise_exception(pending_exception, pending_tval);
return;
......
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