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Ruchika Kharwar authored
The patch 1. Sets up the addition clock selection register CM_CLKSEL_WKUPAON explicitly rather than depending on the POR value. 2. Updates the ABE_DPLL configuration sequence. 3. Code cleanup and improved code readability. Change-Id: Ief65d84c82c36e0c58076fc6beeab06269e1b0cd Signed-off-by: Ruchika Kharwar <ruchika@ti.com> Signed-off-by: Andrii.Tseglytskyi <andrii.tseglytskyi@ti.com>
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