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add package Microchip_VDFN-8-1EP_3x3mm_P0.65mm_EP0.5x1.2mm

Lukas Smicius requested to merge LHSmicius/kicad-footprints:Microchip_VDFN-8-1EP_3x3mm_P0.65mm_EP0.5x1.2mm into master

Datasheet: http://ww1.microchip.com/downloads/en/DeviceDoc/8L_VDFN_3x3x0_09mm_NMX_C04-00524a.pdf image

Two footprints added:

  • Microchip_VDFN-8-1EP_3x3mm_P0.65mm_EP0.5x1.2mm;
  • Microchip_VDFN-8-1EP_3x3mm_P0.65mm_EP0.5x1.2mm_ThermalVias.

Two KLC Violations left on footprint Microchip_VDFN-8-1EP_3x3mm_P0.65mm_EP0.5x1.2mm_ThermalVias:

  • Violating F7.4 - KLC identifies Thermal Via as Through-hole pad. Maybe it's my mistake...
  • Violating F7.5 - According the Datasheet thermal via diameter is 0.3mm. Minimum via's hole diameter is 0.2mm. So I should make 3.5mm wide via to overcome this violation (now it's 3mm wide according datasheet).
Edited by Lukas Smicius

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