Board outline graphics linewidth should not be taken into DRC completely

Description

File -> Board setup -> "Copper edge clearance" restrictions appeared inside v6, but I cannot place a track over edge.cuts graphic line area (linewidth still accounts into DRC, as in v5.1, but it should not).

It is expected that only "Copper edge clearance" restricts copper clearance from board edge, not linewidth. This is a follow up from #6482 (closed).

Steps to reproduce

1. Draw thick (10mm) board outline;
2. Set File -> Board setup -> "Copper edge clearance" = 0.1 mm;
3. Try to place track 0.1 mm to board outline.

It is forbidden to do this at 10mm / 2 = 5mm, not 0.1 mm, as expected.

UYLd1QtupL

KiCad Version

Application: Pcbnew

Version: (5.99.0-7194-g5c08ad1ab9), release build

Libraries:
	wxWidgets 3.0.5
	libcurl/7.71.0 OpenSSL/1.1.1g (Schannel) zlib/1.2.11 brotli/1.0.7 libidn2/2.3.0 libpsl/0.21.0 (+libidn2/2.3.0) libssh2/1.9.0 nghttp2/1.41.0

Platform: Windows 10 (build 19042), 64-bit edition, 64 bit, Little endian, wxMSW

Build Info:
	Date: Nov 25 2020 22:02:04
	wxWidgets: 3.0.5 (wchar_t,wx containers,compatible with 2.8)
	Boost: 1.73.0
	OCE: 6.9.1
	Curl: 7.71.0
	ngspice: 32
	Compiler: GCC 10.2.0 with C++ ABI 1014

Build settings:
	KICAD_SCRIPTING=ON
	KICAD_SCRIPTING_MODULES=ON
	KICAD_SCRIPTING_PYTHON3=OFF
	KICAD_SCRIPTING_WXPYTHON=ON
	KICAD_SCRIPTING_WXPYTHON_PHOENIX=OFF
	KICAD_SCRIPTING_ACTION_MENU=ON
	KICAD_USE_OCE=ON
	KICAD_SPICE=ON