5.12 project has many new DRC clearance violations by thousandths of mm in 6.0-rc1-461

Description

Project with no DRC errors or warnings in 5.12 has 127 errors and 78 warnings when opened in 6.0.0-rc1-461

Steps to reproduce

1. Clone https://github.com/mmccoyd/hillside/tree/v0.1.0, a small keyboard project.
2. Open project, open PCB, run DRC.

Example errors:

[clearance]: Clearance violation (netclass 'power' clearance 0.5080 mm; actual 0.5074 mm)
    Rule: netclass 'power'; Severity: error
    @(218.4284 mm, 143.8074 mm): Through hole pad 2 [Net-(D18-Pad2)] of D18
    @(234.8400 mm, 49.9900 mm): Zone [GND] on F.Cu

Replicated for top and bottom copper layers and many pads.

Also

[copper_edge_clearance]: Board edge clearance violation (board setup constraints edge clearance 0.0250 mm; actual 0.0000 mm)
    Rule: board setup constraints edge; Severity: error
    @(130.0300 mm, 116.6100 mm): Line on Edge.Cuts
    @(129.1800 mm, 115.8600 mm): Pad 2 [Net-(D5-Pad2)] of D5 on B.Cu

And others.

KiCad Version

Application: KiCad PCB Editor

Version: (6.0.0-rc1-461-ge5d6ec836f), release build

Libraries:
	wxWidgets 3.1.5
	libcurl/7.64.1 SecureTransport (LibreSSL/2.8.3) zlib/1.2.11 nghttp2/1.39.2

Platform: macOS Catalina Version 10.15.7 (Build 19H1419), 64 bit, Little endian, wxMac

Build Info:
	Date: Dec 14 2021 08:16:44
	wxWidgets: 3.1.5 (wchar_t,wx containers)
	Boost: 1.76.0
	OCC: 7.6.0
	Curl: 7.64.1
	ngspice: 35
	Compiler: Clang 12.0.0 with C++ ABI 1002

Build settings:
	KICAD_USE_OCC=ON
	KICAD_SPICE=ON