[sim1.zip](/uploads/e271c3993df30b2fbc5da2529b121a8e/sim1.zip) Just playing around and yes the spice models aren't fully setup. If `vds_max=60` is set on Q1 using the spice model editor (under Limits of the VDMOS model), the simulator returns ``` Error on line 12 or its substitute: q1 probe_int_net-_q1-d__q1_1 net-_q1-g_ 0 vto=1.6 kp=170m rd=0 rs=750m rg=3 mtriode=1.25 ksubthres=100m rb=140m is=40f cjo=50p vds_max=60 could not find a valid modelname ``` Also trying to re-open the model editor after setting that value results in  Removing vds_max=60 allows the simulator to simulate (although not correctly but that's because I haven't finish setting up the models :P) # KiCad Version <!-- Copy version information (from main menu Help->About KiCad ->Copy Version Info) and paste it between the triple backticks below to preserve the formatting. --> ``` Application: KiCad Schematic Editor x64 on x64 Version: 7.0.1, release build Libraries: wxWidgets 3.2.2 FreeType 2.12.1 HarfBuzz 5.0.1 FontConfig 2.14.1 libcurl/7.83.1-DEV Schannel zlib/1.2.13 Platform: Windows 10 (build 19045), 64-bit edition, 64 bit, Little endian, wxMSW Build Info: Date: Mar 11 2023 03:41:46 wxWidgets: 3.2.2 (wchar_t,wx containers) Boost: 1.80.0 OCC: 7.6.2 Curl: 7.83.1-DEV ngspice: 39 Compiler: Visual C++ 1934 without C++ ABI Build settings: KICAD_SPICE=ON ```