Show VIA clearance while placing
Description
In relation to #8838 (closed). It would be nice if VIA's clearance would be shown when placing it. It would ease the process in dense places. Clearance is probably related to net class setting (I don't use this feature so don't know), so clearance should be taken and visualized on the fly.
Steps to reproduce
- Try to place VIA in dense places. Usually this operation is blocked by autorouter, cannot place if clearance violation occurs;
- Guess if switching grid to tiniest available helps (decrease the step to move VIA more precisely).
- This is not possible without actually switching grid to lowest setting. This would not be necessarry if VIA's clearance could be seen while moving it with a mouse.
KiCad Version
Application: KiCad PCB Editor (64-bit)
Version: (5.99.0-11498-g1a301d8eea), release build
Libraries:
wxWidgets 3.1.5
libcurl/7.74.0-DEV Schannel zlib/1.2.11
Platform: Windows 10 (build 19042), 64-bit edition, 64 bit, Little endian, wxMSW
Build Info:
Date: Jul 22 2021 08:59:46
wxWidgets: 3.1.5 (wchar_t,STL containers)
Boost: 1.75.0
OCC: 7.5.0
Curl: 7.74.0-DEV
ngspice: 34
Compiler: Visual C++ 1928 without C++ ABI
Build settings:
KICAD_USE_OCC=ON
KICAD_SPICE=ON
Edited by Jon Evans