F.Fab contents spuriously affect automatic board edge generation

Description

When generating automated board edges (no Edge.Cuts contents are defined), the (not physical) F.Fab layer contents are spuriously considered.

Steps to reproduce

1. Make a new layout.
2. Add an element with a longer name than physical format, eg. Hirose_FH12-10S-0.5SH_1x10-1MP_P0.50mm_Horizontal
3. Go to 3D preview and watch the board outline be generated with unduly large Edge.Cuts.
4. Go back to layout and mark the F.Fab name of this connector as not shown.
5. Go back to 3D and see the board shrink.

Suggested fix

• Exclude F.Fab contents when auto-generating board outlines in the event Edge.Cuts has not been defined.

KiCad Version

Application: KiCad PCB Editor arm64 on arm64

Version: 9.0.7, release build

Libraries:
	wxWidgets 3.2.8
	FreeType 2.13.3
	HarfBuzz 10.1.0
	FontConfig 2.15.0
	libcurl/8.7.1 (SecureTransport) LibreSSL/3.3.6 zlib/1.2.12 nghttp2/1.67.1

Platform: macOS Version 26.2 (Build 25C56), 64 bit, Little endian, wxMac
OpenGL: Apple, Apple M4, 2.1 Metal - 90.5

Build Info:
	Date: Jan  1 2026 21:36:00
	wxWidgets: 3.2.8 (wchar_t,wx containers)
	Boost: 1.87.0
	OCC: 7.8.1
	Curl: 8.7.1
	ngspice: 44.2
	Compiler: Clang 16.0.0 with C++ ABI 1002
	KICAD_IPC_API=ON